Wafer-level_vacuum_packaging_for_MEMS .pdf

Wafer-level vacuum packaging for MEMS R. Gooch,a)T. Schimert, W. McCardel, and B. Ritchey Raytheon Systems Company, MS 35, Dallas, Texas 75243 D. Gilmour and W. Koziarz Air Force Research Laboratory/IFTE, Rome, New York 13441-4505 Received 12 October 1998; accepted 26 April 1999! Vacuum packaging of high performance infrared IR! MEMS uncooled detectors and arrays, inertial MEMS accelerometers and gyros, and radio frequency rf! MEMS resonators is a key issue in the technology development path to low cost, high volume MEMS production. Wafer-level vacuum packaging transfers the packaging operation into the wafer fab. It is a product neutral enabling technology for commercialization of MEMS for home, industry, automotive, and environmental monitoring applications. 4 in. wafer-level vacuum packaging has been demonstrated using IR MEMS bolometers and results will be presented in this article. In addition to the wafer-level packaging results, vacuum package reliability results obtained on component-level ceramic vacuum packages will also be presented. 1999 American Vacuum Society. S0734-210199!21204-3# I. INTRODUCTION Vacuum packaging of high performance infrared IR! MEMS uncooled detectors and arrays,1as well as, inertial MEMS accelerometers and gyros, and radio frequency rf! MEMS resonators is a key issue in the technology develop- ment path to low cost, high volume MEMS production. Most uncooled detector technologies employ a thin, thermally re- sponsive suspended membrane pixel design thermally iso- lated from the supporting substrate by long thin thermal iso- lation legs. The typical suspended membrane thermal isolation measured in terms of thermal resistance is RTH.1 3107K/W i.e., thermal conductance GTH,131027W/K. This level of thermal isolation requires a vacuum environ- ment with sub 10 mTorr vacuum to eliminate thermal loss through gas conductance in the package. In this article, recent results on wafer-level vacuum pack- aging of IR MEMS uncooled detectors are presented and contrasted with a component-level ceramic vacuum package approach. A comparison of component-level and wafer-level package approaches is shown in Fig. 1. The component-level vacuum packaging process involves dicing up the MEMS wafer and mounting MEMS die in individual ceramic pack- ages which are subsequently sealed and tested. In the wafer- level packaging approach, the MEMS die are sealed in a single sealing process and subsequently tested at the wafer level. The wafer is diced into individual vacuum packaged die only after testing is completed. The key advantages of this wafer level approach to vacuum packaging are substan- tially lower cost and higher volume throughput relative to the component-level vacuum packaging approach. Wafer-level packaging also offers key advantages in terms of miniatur- ization and system integration for low cost microsensor ap- plications. Results for wafer-level vacuum packaged a-Si microbo- lometer arrays are presented. Wafer-level packaged arrays with sub 10 mTorr vacuum have been demonstrated. Results from ongoing testing of sealed wafer-level packages indicate package lifetimes of seven months with no degradation of package vacuum thus far. A 4 in. wafer-level vacuum pack- age process with 78% seal yield across the wafer has been demonstrated. Reliability results for an 84-pin ceramic vacuum package with 0.7in.30.7in. cavity and a 16-pin CERDIP with 0.2in.30.3in. cavity are also presented. The ceramic pack- ages are sealed with an antirefl ection-coated Si or Ge lid. Sub 10 mTorr vacuum has been demonstrated for packaged a-Si microbolometer arrays. In addition, ceramic vacuum packaged microbolometer arrays have been subjected to high-temperature stability bake testing at 150C for 1500 h at the Air Force Research Laboratory, Rome, NY, with no degradation in package vacuum. The ceramic vacuum pack- age has been used to reliably package a-Si microbolometer arrays with thermal resistance RTH.73107K/W indicating thermal isolation in the package approaching the radiation limit. II. WAFER-LEVEL VACUUM PACKAGING Wafer-level vacuum packaging is under development for low cost, high volume IR MEMS inertial MEMS, and rf MEMS applications. Initial development was carried out on 1 in. parts sawed from 4 in. wafers. The wafer-level packag- ing process has now been scaled up to 4 in. wafers. Recently, a 4 in. wafer-level vacuum packaging demonstration using a-Si microbolometer array wafers has been carried out with sealing yield of 78% across the wafer. A 1 in. wafer-level package is shown in Fig. 2a!. The 1 in. part has six individually packaged a-Si microbolometer die each with a seal ring as shown in Fig. 2b! A 1 in. wafer contains four two-channel microbolometer package die and two four-channel package die, respectively, used in IR gas sensor applications.1The sealed bolometer cavity is ad- dressed using a metal interconnect running under the seal as shown in Fig. 2b!. The interconnects are electrically isolated a!Electronic mail: r-gooch 22952295J. Vac. Sci. Technol. A 174, Jul/Aug 19990734-2101/99/174/2295/5/$15.001999 American Vacuum Society from the seal ring by an insulating SiN layer. A 4 in. mi- crobolometer wafer showing the seal ring architecture is shown in Fig. 2c!. Wafer-level vacuum package results demonstrating pack- age vacuum ,10 mTorr are shown in Fig. 3. To obtain ac- curate calibration of the cell pressure in the wafer-level vacuum packaged die, a hole was drilled in one of the sealed packages and the package was placed in a vacuum Dewar to obtain the calibration curve of microbolometer signal versus vacuum pressure shown in the fi gure. Using the curve, the signal in the sealed package 54 mV! corresponds to a sealed vacuum level of 9 mTorr. Vacuum level stability measurements of the six packaged die in a 1 in. wafer-level package Fig. 2b!# have been car- ried out over a seven month period with no degradation in microbolometer signal in any of the packaged die. The vacuum stability results for wafer-level package No. 123 are shown in Fig. 4. The microbolometer signal in fi ve of the six package die is shown to remain steady over the seven month test period indicating that wafer-level package vacuum has not deteriorated. A short developed in package die No. 1 making data unavailable after the third measurement. These results are the fi rst demonstration of a long term reliable uncooled detector wafer-level vacuum package. The package will continue to be monitored to evaluate wafer-level vacuum package integrity over an extended time period. The wafer-level packaging process has been scaled up to 4 in. wafers Fig. 2c!# with a recent 4 in. a-Si bolometer wafer-level vacuum packaging demonstration exhibiting sealing yield of 78% for functional die across the wafer. Individual die sawed from sealed 4 in. wafers are shown in Fig. 9 and are discussed below in Sec. III. III. RELIABILITY STUDIES FOR COMPONENT- LEVEL CERAMIC VACUUM PACKAGING In this section, vacuum package stability and reliability studies obtained from both high-temperature bake stability and long-term vacuum stability tests on component-level ce- ramic packages will be presented. The 84-pin ceramic vacuum package developed for large area MEMS, is shown in Fig. 5. An open 84-pin alumina ceramic package with 0.7in.30.7in. cavity area is shown in Fig. 5a! with two 256378a-Si microbolometer arrays mounted in the cavity. The package with a solder-sealed antirefl ection AR!-coated Ge window 812mm spectral bandpass! is shown in Fig. 5b!. The Ge window is used because of its transparency in the 812m m spectral band. Also, the low coeffi cient of ther- mal expansion CTE! mismatch between the Al2O3ceramic package (CTEAl2O3ceramic;731026C21) and the Ge window (CTEGe;6.331026C21) is a critical requirement for a high yield, reliable solder seal process using this large package. Vacuum packaging results obtained on a sealed 84-pin FIG. 1. Comparison of component level and wafer-level vacuum packaging approaches. FIG. 2. a! 1 in. wafer-level vacuum package. Seal ring architecture for b! 1 in. wafer, and c! 4 in. wafer. 2296Goochet al.: Wafer-level vacuum packaging for MEMS2296 J. Vac. Sci. Technol. A, Vol. 17, No. 4, Jul/Aug 1999 package are shown in Fig. 6. As with the wafer-level pack- age, vacuum calibration was performed after the package was sealed and tested by drilling a hole in the lid of the sealed package and placing the package in a vacuum Dewar to obtain a calibration curve of microbolometer signal versus vacuum level. A large area 84-pin ceramic vacuum package post-seal calibration curve of microbolometer signal versus vacuum level is shown in Fig. 6. The bolometer signal level measured for the sealed package in this case is 101 mV. From the calibration curve in the fi gure, this corresponds to sealed package vacuum of 3 mTorr. Two 84-pin ceramic vacuum packages containing the twin 256378 arrays have been subjected to high-temperature bake stability testing at the Air Force Research Laboratory, Rome, NY. In the testing, packages 593 and 595 were sub- jected to 150C bake for 1500 h. The results, shown in Fig. 7, display the bolometer signal level for two channels 26, 218! in each package. The packages were tested after a total of 100 h at 150C bake and retested after a total of 350, 1000, and 1500 h, respectively, at 150C bake. After 100 h, the detector channels in both showed a slight increase in bolometer signal. After 1500 h, the two detector channels in package 593 were essentially unchanged. In package 595, there is a slight drop in signal after 350 h due to partial delamination of the antirefl ection coating. However, the fi nal signal levels for the two channels are comparable to the ini- tial signal levels indicating no vacuum degradation in the package. It is noted that the a-Si microbolometer signal levels in Fig. 7 are two to three times larger that that shown in Fig. 6. Both sets of measurements were carried out under identical conditions. The improved signal levels in Fig. 7 are due to recent enhancement in a-Si microbolometer pixel thermal isolation. In these 50mm350mm pixel elements, substan- tially enhanced thermal resistance Rth.73107K/W ther- mal conductance Gth,1.431028W/K) has been achieved compared with Rth;(24)3107K/W reported previously.1 Finally, with regard to long-term package vacuum, it is noted that the oldest of 84-pin ceramic vacuum packages are now more that 12 months old and show no signs of vacuum degradation. Furthermore, results from long-term 29 month! vacuum package stability tests carried out using previously developed component-level 16-pin CERDIP vacuum pack- FIG. 3. 1 in. wafer-level vacuum package with ,10 mTorr vacuum. FIG. 4. Wafer-level package stability results over seven month period Package 123!. FIG. 5. 84-pin ceramic package a! showing mounted arrays, b! sealed. 2297Goochet al.: Wafer-level vacuum packaging for MEMS2297 JVST A - Vacuum, Surfaces, and Films ages sealed with AR-coated silicon lids is shown in Fig. 8. In the fi gure, the ratio of fi nal microbolometer signal after 29 months! to the initial signal is shown and remains essentially unity for the 17 packages tested indicating no degradation in microbolometer signal, and hence package vacuum, over the 29 month period. Figure 9 shows six WLVP die which were sawed from sealed 4 in. wafers and mounted in test packages to carry them through the same set of environmental tests as de- scribed for ceramic packaged bolometer arrays. Evaluation is ongoing at present. All die have survived unchanged after several hundred hours of 150C baking. IV. SUMMARY Vacuum packaging of high performance IR MEMS un- cooled detectors and arrays, as well as, inertial MEMS ac- celerometers and gyros, and rf MEMS resonators is a key issue in the technology development path to low cost, high volume MEMS production. In this article, recent results on wafer-level vacuum packaging of IR MEMS uncooled detec- tors were presented and contrasted with a component-level ceramic vacuum package approach. In the wafer-level pack- aging approach, the MEMS die sealed in a single sealing process and subsequently tested at the wafer level. The wafer is diced into individual vacuum packaged die only after test- ing is completed. The key advantages of this wafer level approach to vacuum packaging are substantially lower cost and higher volume throughput relative to the component- level vacuum packaging approach. Wafer-level packaging also offers key advantages in terms of miniaturization and system integration for low cost microsensor applications. Results for wafer-level vacuum packaged a-Si microbo- lometer arrays were presented. Wafer-level packaged arrays with sub 10 mTorr vacuum were demonstrated. Results from ongoing testing of sealed wafer-level packages indicate package lifetimes of seven months with no degradation of package vacuum thus far. A 4 in. wafer-level vacuum pack- age process with 78% seal yield across the wafer was dem- onstrated. Reliability results for an 84-pin ceramic vacuum package with 0.7in.30.7in. cavity and a 16-pin CERDIP with 0.2in.30.3in. cavity were also presented. The ceramic pack- ages were sealed