PCB UL样品标准要求.doc

_ATTACHMENT: SAMPLE PREPARATION INSTRUCTIONS附件：样品准备说明General总述SAMPLE PREPARATION Prepare samples by subjecting them to ALL operations of the specified process. 样品准备准备之样品必须经受所有的指定的工艺流程 Include all etching, baking and curing steps.包括所有蚀刻，烘烤和干燥过程。 Expose the samples to all maximum times, temperatures and pressures.使样品经受所有的最长时间，最高温度和最大压力。 Subject samples to the maximum number of cycles specified in any step.使样品经受任何指定步骤中的最多次循环。Part A章节ABD SAMPLES Make certain the conductor pattern which you use to build the samples reflect your rating requirements. These include:BD样品务必确定样品的导线分布反映您所要求的等级，包括： minimum copper thickness最小铜厚 minimum conductor widths 最小导线宽度 maximum unpierced diameter 最大区域直径 minimum thickness of laminate 基材最小厚度We will assign pattern limits based on actual measurements of the test samples. 我们将根据您所提供的测试样品的实际尺寸来标定样品规格界限。Attachment T1, taken from the Standard for Printed Wiring Boards, UL 796, Figure 10.1, illustrates a typical test pattern. The test pattern should appear on both sides of the samples, one side being the mirror image of the other. If you desire Recognition for singlesided printed wiring boards only, the test pattern only need appear on one side of the samples.附件T1，取自印刷线路板标准UL796，图10.1，图示为典型的样品测试式样。若为双面板，则双面的布线式样应互为镜像。若为单面板，则仅有一面为此布线式样。If the maximum unpierced diameter wont fit on the test pattern, please provide a separate set of samples. You may etch these into either a circle or a square. See Figure 10.3.若最大直径区域在附件T1样品图中无法容下，请另外准备一组体现最大直径的样品。可以蚀刻成圆形或者正方形。参见图10.3。COPPER THICKNESS If you plan to buy copper clad laminate with a minimum copper thickness of less than 34 microns (1 oz./square foot), you should plate your samples to 34 microns for testing purposes.铜厚若您将要使用的覆铜基材的铜厚小于34微米，则为了测试需要，请将您的样品铜厚镀至34微米。In production, if you plan to plate copper to more than 102 microns thick (3 oz./square foot), please provide an extra set of samples built up to your maximum copper thickness.在实际生产中，若您使用的铜箔厚度超过102微米，请另外提供一组符合您最大铜厚的样品。MULTILAYER CONSTRUCTION For multilayer boards, you must use the same conductor pattern on the external and internal layers. Position the unpierced areas directly over each other.多层板结构对于多层板，在内外层上都必须使用相同的导线分布式样。最大直径区域应互相覆盖。We require the construction to include two or more internal conductor layers. One of the internal conductor layers must be the maximum internal conductor thickness. The sample must also include the minimum laminate (core) and prepreg thickness to be Recognized for the Printed Wiring Board Type.我们要求的结构应包含两层或两层以上的内部导线层。其中的一层必须符合最大内层铜厚要求。样品也必须包含申请认证的印刷线路板的基材最小厚度和半固化片最小厚度。For additional instructions on multilayer sample construction, refer to Standard UL 796, Sections 17 and 20.多层板样品结构的其他说明，请参照标准UL 796，第17节和第20节。Note The board total buildup thickness should be at the thickness or within the range specified in the sample requirements.注意 压合后的最小厚度应符合样品要求的最小厚度或在指定的厚度允许范围内。PART A: ATTACHMENT T1Figure 10.1 BD Test PatternBD测试样品图A Minimum width conductor of configuration specified by the fabricator. See note e.PWB生产商指定布线中宽度最小的导线。见注释e 。B 1.6 mm (0.062 inch) wide conductor of configuration specified by the fabricator. See note ePWB生产商指定布线中宽度为1.6mm的导线。见注释e 。B1 (Not Shown) one or more potential conductor widths may be included between the minimumconductor width A and the 1.6 mm conductor width B. See note e.可以在最小导线A和1.6mm导线B的宽度之间增加1条和多条导线（没有画出）。见注释e 。C 10 mm (0.375 inch) diameter unpierced circular conductora.直径为10 mm（0.375 inch）的圆形导体a 。D 13 mm (0.5 inch) diameter unpierced circular conductora.直径为13 mm(0.5inch)的圆形导体a 。E Maximum diameter unpierced circular conductor specified by fabricator. See note b.PCB生产商指定的最大的圆形导体。见注释b 。F Edge conductor of a minimum width specified by the fabricator. Shall be within 0.4 mm (0.015 inch)of the board edge, and not sheared at the edge. See notes a and e.制造商制定的最小边缘导线。应距离板边缘0.4mm (0.015 inch) 内，且不切边。见注释 a，e 。G Plated-through holes. At least 4 plated-through holes shall be present on the samplea. Theplated-through hole sample location is optional, but shall not contact other circuit pattern features. See note b.镀通孔a ，至少4个镀通孔，位置不限，但不能跟其他线路图形接触。见注释b 。H Plated contactsa, of minimum width. See notes b and c.有最小宽度的金手指a 。见注释b，c 。I Three contactsa, of maximum width. See notes b, e and e.有最大宽度的三个触点a 。见注释b，c和e 。a Optional, but must be on samples if acceptance of this type of construction is desired. 可选的，但是如果希望采用这种结构就必须在样品上体现。b Items E, G, H, and I may be provided on separate samples. 条款E,G,H和I可以在不同的样品中分别提供。c Plated contacts are required only if the plating is different from the conductor. 只有当触点镀层不同于导体时，镀金手指才要求提供。d Test Pattern Artwork is available from the IPC Association Connecting ElectronicsIndustries, 300 Lakeside Drive, Bannockburn, IL 60015, Phone: 847-6157100, Fax: 847-6157105, order number IPC A22. IPC Association Connecting Electronics Industries, 300 Lakeside Drive, Bannockburn, IL 60015, 电话: 847-6157100, 传真: 847-6157105, order number IPC A22可以提供测试图形的底片。e Conductor patterns are required on the internal layers of multilayer samples. Internalconductor widths are to vary as needed for the metal weights and thickness employed but shallnot be narrower than the external conductor width. 对于多层板，内层导线分布也有要求，内层导线的宽度和厚度都可以变化，但是不能窄于外层导线的宽度。Figure10.2 : Maximum unpierced conductor area measurement最大区域导体的度量A Production printedwiring board.PWB的产品。B Largest unpierced conductor section.最大导体区域。E Largest circle that fits B (to be acceptable, the area is not to exceed that of circle E in Figure 10.1).适合B区域的最大圆（可以接受的，该区域不能超过在图10.1中的圆E）。A Plated through holes. At least 4 plated-through holes shall be present on the sample.* The plated-through hole sample location is optional, but shall not contact other circuit pattern features. 至少4个镀通孔，位置不限，但不能跟其他线路图形接触。B Maximum unpierced circular conductor specified by fabricator. PWB生产商指定的最大区域圆形导体。C Distance from edge of circular conductor (B) to edge of sample shall be sufficient to accommodate plated through holes (A).大圆边缘与板边的距离必须足够容纳PTH孔G Optional, but must be on samples if acceptance of this type of construction is desired. 可选的，但是如果这个型号采用这种结构就必须在样品上体现。-可编辑修改-Part B章节BDO SAMPLES Make certain the conductor pattern which you use to build the samples reflect your rating requirements. These include:DO样品务必确定样品的导线分布反映您所要求的等级，包括： minimum copper thickness最小铜厚 maximum unpierced diameter 最大区域直径 minimum thickness of laminate 基材最小厚度We will assign pattern limits based on actual measurements of the test samples. 我们将根据您所提供的测试样品的实际尺寸来标定样品规格界限。Attachment T2, taken from the Standard for Printed Wiring Boards, UL 796, Figure 10.3, illustrates a typical test pattern. The test pattern should appear on both sides of the samples, one side being the mirror image of the other. If you desire Recognition for singlesided printed wiring boards only, the test pattern only need appear on one side of the samples.附件T2，取自印刷线路板标准UL796，图10.3，图示为DO测试样品式样。若为双面板，则双面的布线式样应互为镜像。若为单面板，则仅有一面为此布线式样。MULTILAYER CONSTRUCTION For multilayer boards, you must use the same conductor pattern on the external and internal layers. Position the unpierced areas directly over each other.多层板结构对于多层板，在内外层上都必须使用相同的导线分布式样。最大直径区域应互相覆盖。We require the construction to include two or more internal conductor layers. One of the internal conductor layers must be the maximum internal conductor thickness. The sample must also include the minimum laminate (core) and prepreg thickness to be Recognized for the Printed Wiring Board Type.我们要求的结构应包含两层或两层以上的内层导线。其中的一层必须符合最大内层铜厚。样品也必须包含申请认证的印刷线路板的基板最小厚度和半固化片最小厚度。For additional instructions on multilayer sample construction, refer to Standard UL 796, Sections 17 and 20.多层板样品结构的其他说明，请参照标准UL 796，第17节和第20节。Note The board total buildup thickness should be at the thickness or within the range specified in the sample requirements.注意 压合后的最小厚度应符合样品要求的最小厚度或在指定的厚度允许范围内。PART B: ATTACHMENT T2Figure 10.3 : DO Test PatternDO测试样品图A Plated through holes. At least 4 plated-through holes shall be present on the sample.* The plated-through hole sample location is optional, but shall not contact other circuit pattern features. 至少4个镀通孔，位置不限，但不能跟其他线路图形接触。B Maximum unpierced circular conductor specified by fabricator. PWB生产商指定的最大区域圆形导体。C Distance from edge of circular conductor (B) to edge of sample shall be sufficient to accommodate plated through holes (A).大圆边缘与板边的距离必须足够容纳PTH孔G Optional, but must be on samples if acceptance of this type of construction is desired. 可选的，但是如果这个型号采用这种结构就必须在样品上体现。Part C章节CFL SAMPLES Construct the samples in the minimum board thickness to be Recognized. Prepare them by subjecting doublesided laminate (unless you always use singlesided laminate) to all steps of your manufacturing process. Remove all of the conductive material during etching. There should be no holes in the specimens. See Figure A.Note that the minimum thickness cannot be less than the minimum Recognized thickness of the base laminate. Also note in certain instances, UL assigns minimum thicknesses based on standard tolerances. See Attachment T3 for the minimum thickness values.FL测试样品以要求认证的最小板厚来准备测试样品。准备经历所有生产工艺的双面板（除非您总是使用单面板）。用蚀刻方式除去所有导电材料。样品应无洞。参见图A。注意：样品的最小厚度不能小于已被认证的基材的最小厚度。同时应注意，在特定情况下，UL可根据标准公差对最小厚度有一定范围的容许量。参见T3最小厚度值。Cut the specimens to 125 5 mm long by 13.0 0.5 mm wide. The edges should not be frayed. The radius on the corners should be 1.3 mm or less.将样品切割成 长：125 5 mm，宽：13.0 0.5 mm。边缘不应有磨损。不需倒角，角半径不应超过1.3mm。MULTILAYER FL SPECIMENS Etch all conductive material from both the internal and the external surfaces when constructing multilayer test specimens.多层板FL测试样品 用蚀刻方式除去所有内外表面导电材料。PART C: ATTACHMENT T3Construction of Samples for FL TestFL样品结构W(b)L(a)(c)T(d)Prepare the samples by subjecting doublesided laminate (unless you always use single sided laminate) to all steps of your manufacturing process. Remove all of the conductive material during etching. There should be no holes in the specimens and the edges should not be frayed.请使用双面的基材来制作样品（除非你申请的是单面板），样品必须经受所有的指定的工艺流程。用蚀刻方式除去所有导电材料。样品上不允许有孔，样品边缘应没有毛边，破损。Note that the minimum thickness cannot be less than the minimum Recognized thickness of the base laminate. Also note in certain instances, UL assigns minimum thicknesses based on standard tolerances. See attachment T3 for the minimum thickness values. 注意：样品的最小厚度不能小于已被认证的基材的最小厚度。同时应注意，在特定情况下，UL可根据标准公差对最小厚度有一定范围的容许量。参见T3最小厚度值。For multilayer specimens, remove all conductive material from both the internal and the external surfaces of the samples during etching.对于多层样品, 制作时请用蚀刻方式除去所有内外表面导电材料.NOTES:(a) - Length: Samples should measure 125 5 mm (5.0 0.2 in.) in le