光电子材料导论第一章-信息处理技术和材料

1、第二章、信息处理技术和材料,大规模集成电路为基础的电子计算机技术是信息处理的主要技术，以硅材料为核心的集成电路发展迅速，它占集成电路的90以上。 1944年冯.诺依曼提出程序存储和顺序计算的概念； 1946年第一台电子计算机ENIAC诞生； 1948年Bell Lab发明了二极管；1954年第一台晶体管计算机诞生；1958年Firchrd公司的诺宜斯发明了第一块集成电路， 1968年摩尔、诺宜斯和管理能手格罗夫创立Intel公司，Intel成为现代计算机的主流。, 课件下载地址,半导体动态随机存储器,自1958年问世以来，硅集成电路器件集成度提高了100 万倍，单位价格下降为100万分之一。这

2、主要与光刻线宽缩小和成品率提高、单晶硅片的尺寸增大和质量提高有关。 目前，大规模硅集成电路以MOS（Metal On Silicon）为主流技术，迎来深亚微米（0.1 m）硅微电子技术。器件最小沟道长度将缩小到 30 nm 50 nm，栅氧化层厚度为 2 nm，需要考虑诸如：强场效应、绝缘氧化物量子隧穿、沟道掺杂原子统计涨落、互联时间常数与功耗和光刻技术等。 小于0.1 m 的线条属于纳米范畴，它的线宽已与电子的德布罗意数相近。电子在此种器件内部的输运和散射会呈现量子化特性。,固态纳米电子器件可按照电子在固体中受限的具体情况分为三类，即量子点器件（人造原子）、共振隧穿器件（共振隧穿二极管RTD

3、S和振隧穿晶体管RTTS）以及库仑阻塞效应的单电子器件（单电子晶体管SET”S和单电子存储器SEMS）。纳米电子器件的一个共同特征是它们都有一个尺寸在5 nm 100 nm 之间的由半导体或金属材料组成的“小岛”，行为类似于FET器件的沟道，“岛”被势垒所包围，以阻止电子进入岛区。 制作固体量子器件采用IIIV 族化合物半导体材料（易获得高晶体质量和原子级平滑界面的异质结构材料和高的电子迁移率）。但缺乏理想的绝缘介质和顶层表面暴露于大气而导致的氧化或杂质污染等，人们把目光投向发展硅基材料体系。,1998 年出现了绝缘层上硅材料SOI（Silicon On Insulator），它推动微电子技术

4、的进一步发展。与硅基材料及其器件相比，由于避免了器件与衬底间的寄生效应，SOI具有许多优点。如，高的开关速度、高密度、抗辐射、无闭锁效应等，与CMOS技术相比，SOI技术使芯片的性能提高35。,当计算机浮点运算速度高于100亿次以上时，需要考虑光信息处理。 光信息处理可以充分发挥并列处理的优点，能高速处理信号。以图像为对象的光信息处理已研究多年。 目前，以全光计算机为目标的、用光学系统完成一维或多维数据的数字计算还处于探索阶段。 研制出高效低功耗的光子器件及相应的材料仍然是关键所在。在并列处理中首先要有面阵的光子集成器件。 高密度垂直腔面发射激光器（VCSEL）的光子集成回路是二维光信息实时处

5、理和图形识别的关键器件。 目前研制出的高密度对称反射式自电光效应（SRSEED）无腔面的光双稳态开关集成面阵，可在光功耗极低（小于10 fJ/m2）情况下对光信息进行多路和二维处理。,电子计算机电路中的电阻和电容使电信号的传递速度受到RC驰豫时间的限制，并产生“时钟歪斜”、互联拥挤、电子信号容易自身干扰等问题， 光互联集成回路可以解决这个问题。若干个光学开关和存储器以及光电转换元件用波导方式连成回路，这时的信息处理器是光电混合型的。 通过发展可寻址的光源阵列、光学双稳态门阵列、全息衍射光栅和监测器阵列，并行通道可达106数量级。进一步发展光学神经网络、光计算算法和结构及高密度交叉光互联等技术逐

6、步发展成全光计算机。,需要发展光信号处理技术及材料,All-optical signal processing,Wavelength conversion All-optical logic gates Optical Add/Drop Multiplexing (OADM) 3 R regeneration Optical sampling All-optical demultiplexing All-optical packet switching,半导体材料（半导体激光器和放大器） 材料特点 非线性系数大（仅需要毫瓦量级的功率） 响应速度快（可实现百皮秒、皮秒及飞秒） 体积小重量轻（易于

7、集成） 缺点 偏振相关 码型相关,Outline,Introduction Review of Fabry-Perot laser diode properties All-optical header processor All-optical packet switch All-optical add/drop node Conclusion,All-optical packet switching,The concept of the packet,Packet-switched networks will be the networks of the future,Payload,He

8、ader,Guard Period,All-Optical or Hybrid-Optical Packet Switching,Hybrid optical packet switching The packet headers are converted into the electrical domain for processing The data payload remains in the optical domain Advantage Combines the processing power of electronics and the transmission bandw

9、idth of optical fibers Disadvantage Processing speed limited by electronics and the required optical to electrical and electrical to optical conversions,All-Optical Packet Switching,Both the header processing and packet forwarding/switching are carried out in the optical domain Advantages Ultra-high

10、 speed operation by eliminating the optical-electrical and electrical-optical conversion Cost reduction Difficulties Lack of optical random access memory Lack of sophisticated all-optical processing power,All-Optical Packet Switching Requires,All-optical signal processing to read the packet headers

11、Only simple bit-wise optical logic gates have been demonstrated All-optical memory so that the decision made by the header processor can affect the entire packet Optical flip-flops are demonstrated H. J. S. Dorren et al., J. Lightwave Technol., 21, 2 (2003). M. Takenaka and Y. Nakano, Proc. OFC 2004

12、, paper WL4. All-optical packet forwarding/routing e.g., on/off switches,Outline,Introduction Review of Fabry-Perot laser diode properties All-optical header processor All-optical packet switch All-optical add/drop node Conclusion,Injection Locking: Overview,First proposed by Van der Pol in 1927 “Fo

13、rced oscillations in a circuit with a negative resistance,”Phil. Mag. Series 73, 65 (1927).,Injection locking of FP-LD (Fabry Perot Laser Diode) Injected l should fall within injection locking range of FP modes Minimum injection power & polarization matching required Red-shift of mode comb after inj

14、ection locking asymmetric injection locking curve (Roy Lang, IEEE JQE 82),Review of the Properties of FP-LD,Single-mode injection locking:,Input Power (dB),Output Power (dB),lc,(i) without ld,FP- LD spectrum,l source,FP-LD,Spectra of Free-Running and Injection-Locked FP-LD,Experimental Setup,OSA,PC,

15、CIR,( PC = Polarization Controller ),( CIR = Circulator ),Review of the Properties of FP-LD,Multi-mode injection locking: the presence of a signal at ld affects lowers the injection locking threshold of the signal at lc,Input Power (dB),Output Power (dB),lc,(ii) with ld,FP- LD spectrum,ld,Review of

16、the Properties of FP-LD,Bistability: it takes less power to sustain injection locking than initiating one,Input Power (dB),lc,(ii) with ld,FP- LD spectrum,ld,Review of the Properties of FP-LD,Mode-shift induced by injection locking the gain at data wavelength ld is affected by the presence of a sign

17、al at lc,L. Y. Chan et al., Opt. Lett., 28, 837 (2003).,Injection Locking Depends on:,Polarization of the input signal in FP-LD Optical input power into the FP-LD Wavelength Detune,Outline,Introduction Review of Fabry-Perot laser diode properties All-optical header processor All-optical packet switc

18、h All-optical add/drop node Conclusion,A novel two-level control signal,Operation Principle,Input control packet (lc),b. Input data packet (ld),Payload,Header,Pth1,Pth2,Pth3,Output control packet (lc),PH,PT,PH,PT,Operation Principle,Output control packet (lc),Input control packet (lc),b. Input data

19、packet (ld),Injection-locked,L. Y. Chan, et al. “All-optical header processing by using an injection-locked Fabry-Perot laser diode,” (to appear in February 2005 issue of Microwave and Optical Technology Letters.),Experimental Setup,Experimental Details,Data Packets The header rate is 5 Gb/s and the

20、 payload rate is 10 Gb/s 2 packets with same data pattern but different header Total packet length is 64 bits (at 10 Gb/s) Guard band: 10 bits Input signal wavelengths, power and detune: Data: 1533.69 nm, -20.35 dBm, +0.03 nm, Control: 1539.38 nm, -1.83 dBm, +0.16 nm, CW: 1536.47 nm, -11.95 dBm, +0.

21、03 nm FP-LD Double-channel planar-buried InGaAsP heterostructure. Driving current : 13 mA Temperature: 15 C,Experimental Input Signals,Header at 5 Gb/s payload at 10 Gb/s,Data Packets 1,Control Packets,Data Packets 2,500 ps / div,Header,Payload,Experimental Results,Header at 5 Gb/s payload at 10 Gb/

22、s,data packets,INPUT,control signal,OUTPUT,2 ns/div,pk_1,pk_2,ON,OFF,switched control signal,Using a single Fabry-Perot laser diode,Review of the Properties of FP-LD,Mode-shift induced by injection locking the gain at data wavelength ld is affected by the presence of a signal at lc,L. Y. Chan et al.

23、, Opt. Lett., 28, 837 (2003).,Operation Principle,Output control packet (lc),Input control packet (lc),b. Input data packet (ld),Payload,Header,Guard Period,Injection-locked,Not Injection-locked,Operation Principle,Output control packet (lc),Input control packet (lc),b. Input data packet (ld),d. Out

24、put data packet (ld),Data Packet Blocked,Data Packet Transmitted,Payload,Header,Guard Period,Injection-locked,Not Injection-locked,Proposed 1N All-Optical Packet Switch,output port N (address = 001),output port 1 (address = 100),output port 2 (address = 010),PP,PP,PP,N bits,coupler,implements a nove

25、l self-routing address protocol that requires only bitwise processing X. C. Yuan, V O. K. Li, C. Y. Li, and P. K. A. Wai, “A novel self-routing scheme for all-optical packet switched networks with arbitrary topologies,” J. Lightwave Technol., vol. 21, pp. 329-339 (2003),_,Proposed 1N All-Optical Pac

26、ket Switch,output port N (address = 001),output port 1 (address = 100),output port 2 (address = 010),coupler,_,PP,PP,PP,Data packet format,Proposed 1N All-Optical Packet Switch,output port N (address = 001),output port 1 (address = 100),output port 2 (address = 010),coupler,_,PP,PP,PP,Data packet fo

27、rmat,Proposed 1N All-Optical Packet Switch,output port N (address = 001),output port 1 (address = 100),output port 2 (address = 010),coupler,_,PP,PP,PP,Data packet format,Proposed 1N All-Optical Packet Switch,output port N (address = 001),output port 1 (address = 100),output port 2 (address = 010),c

28、oupler,_,PP,PP,PP,Data packet format,Proposed 1N All-Optical Packet Switch,output port N (address = 001),output port 1 (address = 100),output port 2 (address = 010),coupler,_,PP,PP,PP,Data packet format,Experimental Setup,P. K. A. Wai, et al., CLEO2004, paper CTuFF2.,Experimental Details,Data Packet

29、s The header rate is 5 Gb/sand the payload rate is 10 Gb/s 4 packets with same data pattern but different headers Total packet length is 64 bits (at 10 Gb/s) Guard band: 10 bits Input signal wavelengths, power and detune: Data: 1535.21 nm, -15 dBm, +0.08 nm, Control: 1539.99 nm, +0.17 dBm, -1.04 nm,

30、 CW: 1537.02 nm, -8.50 dBm, +0.02 nm FP-LD Double-channel planar-buried InGaAsP heterostructure. Driving current : 13.5 mA Temperature: 15 C,data packets control signals data packet headers control signal headers switched data packets zoom-in switched data packets,Experimental Results,Separate heade

31、r processing and packet switching,Two-stage Switching,Local Control Signal,d,AOHP,AOS,c,Two-stage Switching,Local Control Signal,AOHP,AOS,Two-stage Switching,AOHP,AOS,Two-stage Switching,AOHP,AOS,Two-stage Switching,AOHP,AOS,Two-stage Switching,AOHP,AOS,Two-stage Switching,AOHP,AOS,Two-stage Switchi

32、ng,AOHP,AOS,Experimental Setup,control signal,data signal,CW signal,AOS,AOHP,FP-LD,SOA,Experimental Details,Data Packets The header rate is 5 Gb/sand the payload rate is 10 Gb/s 4 packets with same data pattern but different headers Total packet length is 64 bits (at 10 Gb/s) Guard band: 10 bits Inp

33、ut signal wavelengths, power and detune: Data: 1542.76 nm, -6.9 dBm, +0.01 nm, Control: 1540.16 nm, -5.9 dBm, +0.22 nm, CW: 1537.13 nm, -11 dBm, +0.02 nm FP-LD Double-channel planar-buried InGaAsP heterostructure. Driving current : 2 threshold current Temperature: 15 C,Experimental Results,data pack

34、ets,control signals,data packet headers,control signal headers,switched control signals,switched control signals,switched data packets,zoom-in switched control signals,data packets,Experimental Results,Experimental Results,switched control signals,switched data packets,zoom-in switched control signa

35、ls,data packets,Outline,Introduction Review of Fabry-Perot laser diode properties All-optical header processor All-optical packet switch All-optical add/drop node Conclusion,All-optical add/drop node for an all-optical packet-switched ring network,All-Optical Add/Drop Node,Local Control Signal,d,AOH

36、P,ADD PORT,DROP PORT,AOS-1,AOS-2,d,c,Inverter,TRANSIT PORT,RING NETWORK,All-Optical Add/Drop Node,Local Control Signal,AOHP,ADD PORT,DROP PORT,AOS-1,AOS-2,Inverter,TRANSIT PORT,RING NETWORK,All-Optical Add/Drop Node,AOHP,ADD PORT,DROP PORT,AOS-1,AOS-2,Inverter,TRANSIT PORT,RING NETWORK,All-Optical A

37、dd/Drop Node,AOHP,ADD PORT,DROP PORT,AOS-1,AOS-2,Inverter,TRANSIT PORT,RING NETWORK,All-Optical Add/Drop Node,AOHP,ADD PORT,DROP PORT,AOS-1,AOS-2,Inverter,TRANSIT PORT,RING NETWORK,All-Optical Add/Drop Node,AOHP,ADD PORT,DROP PORT,AOS-1,AOS-2,Inverter,TRANSIT PORT,RING NETWORK,All-Optical Add/Drop N

38、ode,AOHP,ADD PORT,DROP PORT,AOS-1,AOS-2,Inverter,TRANSIT PORT,RING NETWORK,All-Optical Add/Drop Node,Local Control Signal,AOHP,ADD PORT,DROP PORT,AOS-1,AOS-2,Inverter,TRANSIT PORT,RING NETWORK,All-Optical Add/Drop Node,AOHP,ADD PORT,DROP PORT,AOS-1,AOS-2,Inverter,TRANSIT PORT,RING NETWORK,All-Optica

39、l Add/Drop Node,AOHP,ADD PORT,DROP PORT,AOS-1,AOS-2,Inverter,TRANSIT PORT,RING NETWORK,All-Optical Add/Drop Node,AOHP,ADD PORT,DROP PORT,AOS-1,AOS-2,Inverter,TRANSIT PORT,RING NETWORK,All-Optical Add/Drop Node,AOHP,ADD PORT,DROP PORT,AOS-1,AOS-2,Inverter,TRANSIT PORT,RING NETWORK,All-Optical Add/Dro

40、p Node,AOHP,ADD PORT,DROP PORT,AOS-1,AOS-2,Inverter,TRANSIT PORT,RING NETWORK,All-Optical Add/Drop Node,Local Control Signal,d,AOHP,ADD PORT,DROP PORT,AOS-1,AOS-2,d,d,c,Inverter,RING NETWORK,TRANSIT PORT,Experimental Results,input data packets,input locked control packet for added port,added data pa

41、cket,input control signal for transmitted port,transmitted data packet,data packets at the node output,Design of an All-Optical Packet-Switched Ring Network,Slotted networks The addresses of empty packets are encoded such that they will be accepted by every node. Each node will continue to transmit

42、empty packets even if they have nothing to send If a local packet is blocked at the add port, a signal will be sent back to a electronic controller to resend the packet into the ring,Discussions,The wavelength and power tolerance for the control signal are about 0.05 nm and 1 dB The wavelength and power tolerance for the data packets are about 0.02 nm and 3 dB respectively The switching ratio is about 7.5 dB measured in the time domain with zero level at around 20 dBm The loc