嵌入式软件系统设计：06_timing_sequential

1、Embedded System Architecture Design lecture 05-Timing Jun WANG1outlineTimingClock skewPipeline2Clock SkewThe clock doesnt arrive at all registers at the same timeSkew is the difference between two clock edgesExamine the worst case to guarantee that the dynamic discipline is not violated for any regi

2、ster many registers in a system!3Setup Time Constraint with Clock SkewIn the worst case, the CLK2 is earlier than CLK1Tc 4Setup Time Constraint with Clock SkewIn the worst case, the CLK2 is earlier than CLK1Tc tpcq + tpd + tsetup + tskewtpd 5Setup Time Constraint with Clock SkewIn the worst case, th

3、e CLK2 is earlier than CLK1Tc tpcq + tpd + tsetup + tskewtpd Tc (tpcq + tsetup + tskew)6Hold Time Constraint with Clock SkewIn the worst case, CLK2 is later than CLK1tccq + tcd tcd 7Hold Time Constraint with Clock SkewIn the worst case, CLK2 is later than CLK1tccq + tcd thold + tskewtcd 8Hold Time C

4、onstraint with Clock SkewIn the worst case, CLK2 is later than CLK1tccq + tcd thold + tskewtcd thold + tskew tccq 9Impact of clock skewOverhead for sequential logicIncreases both setup time and hold timeLimitation of combination logicReduce the time for useful combinational processingALL BAD10Avoid

5、clock skewClock treeH-treePLL Phase Locked LoopSeehttp:/www.sentex.ca/mec1995/gadgets/pll/pll.html 11ParallelismTwo types of parallelism:Spatial parallelismduplicate hardware performs multiple tasks at onceTemporal parallelismtask is broken into multiple stagesalso called pipeliningfor example, an a

6、ssembly line12Parallelism DefinitionsSome definitions:Token: A group of inputs processed to produce a group of outputsLatency: Time for one token to pass from start to endThroughput: The number of tokens that can be produced per unit timeParallelism increases throughput.13Parallelism ExampleBen Bitd

7、iddle is baking cookies to celebrate the installation of his traffic light controller. It takes 5 minutes to roll the cookies and 15 minutes to bake them. After finishing one batch he immediately starts the next batch. What is the latency and throughput if Ben doesnt use parallelism?Latency = Throug

8、hput =14Parallelism ExampleBen Bitdiddle is baking cookies to celebrate the installation of his traffic light controller. It takes 5 minutes to roll the cookies and 15 minutes to bake them. After finishing one batch he immediately starts the next batch. What is the latency and throughput if Ben does

9、nt use parallelism?Latency = 5 + 15 = 20 minutes = 1/3 hour Throughput = 1 tray/ 1/3 hour = 3 trays/hour15Parallelism ExampleWhat is the latency and throughput if Ben uses parallelism?Spatial parallelism: Ben asks Allysa P. Hacker to help, using her own ovenTemporal parallelism: Ben breaks the task

10、into two stages: roll and baking. He uses two trays. While the first batch is baking he rolls the second batch, and so on.16Spatial ParallelismLatency = Throughput =17Spatial ParallelismLatency = 5 + 15 = 20 minutes = 1/3 hour Throughput = 2 trays/ 1/3 hour = 6 trays/hour18Temporal ParallelismLatenc

11、y =Throughput = 19Temporal ParallelismLatency = 5 + 15 = 20 minutes = 1/3 hourThroughput = 1 trays/ 1/4 hour = 4 trays/hourUsing both techniques, the throughput would be 8 trays/hour20Usage in digital circuitsPipeline initialConsider a task with latency LNo parallelism:Throughput : 1/LSpatial parall

12、elism (N copies of hardware)Throughput: N/LTemporal parallelism (pipeline)Task is divided into N steps equallyThroughput: N/LIf not divided equally, the longest step with latency L1Throughput: N/L121Usage in digital circuitsReal caseCheck pp152, Fig.3.56&3.57Ex. 2 stages of pipelineDoubles throughpu

13、tSlightly increases the latencyProblemsDependencyYou can check chapter 7 for more22Synchronous Sequential Logic DesignBreaks cyclic paths by inserting registersThese registers contain the state of the systemThe state changes at the clock edge, so we say the system is synchronized to the clockRules of synchronous sequential circuit composition:Every circuit element is either a register or a combinational circuitAt least one circuit element is a registerAll registers receive the