平板显示技术_C2 LCD_2液晶驱动

1、 平板显示技术平板显示技术Flat Panel Display Technology第2章 液晶显示o 1 液晶简介o 2 液晶物理性质o 3 常用液晶显示器件介绍LCD LCD PhysicsPhysicsElectronicsElectronicsDriverDriverErgonomicsErgonomicsHumanHumanFactorsFactorsProductionProductionProcessProcessChemistryChemistryMaterialMaterialScienceScience主要内容驱动是为了静态、动态显示画面，而画面包括色彩、亮度o 如何产生色

2、彩o 如何产生灰度o 寻址（与CRT的区别）o LCD常用驱动方法o 1、如何产生色彩 ？液晶本身不发光 对光进行调制 如何获得不同颜色的光显示术语显示术语 Pixel = picture element, composed of subpixel (dot) to express color y1y2y3y4x1x2x3ColumnsRowsPixel spatialAreaPixel active areaOff-pixelOn-pixelInactive areaNomenclature of a flat-panel display pixel arrayPixel Subdivisi

3、on for ColorBRGBRGBRGBRG1212Pixel Column LinesPixel Row LinesPixel P11 active areaPixel Spatial Area(a) Conventional Pixel Subdivisionfor Three - Color DisplayRGBBRGBRGRBRBBRG12344321Pixel P11 active areaPixel Spatial AreaP12P13P31P21Pixel Column LinesPixel Row Lines(b) Shared Pixel Subdivision for

4、more EfficientActive Area at Higher ResolutionNotes: Field Sequential LCD : dot = pixelGBPixel ArrangementBBRGRGRGRRGBRGBGRGWBRGBRRBGBRGDeltaVertical StripeQuad(RGGB)Quad(RGBW)MosaicMeritsDemeritsFurther Study bi-directional half H = V 3 dots/pixel H = V 4 dots/pixelHHVaaaaBBGGRRo 2、如何产生灰度? 发光强度或透光率

5、与施加信号的关系 抖动法Dithering (面积分割） 分场显示 FRC （时间分割） Dithering+FRCRealization of Gray Level幅度调制PHM调制Pulse High Modulation, PHM : 垂直影像数据电压水平扫描电压0+D-DPHM电压-DPWM调制Pulse Width Modulation, PWM :垂直影像訊號電壓波形水平掃描電壓波形液晶畫素電壓波形Tf1-fD-DFF+DF-D+D-D00液晶的频率响应10 100 1k 10k 100k1.031.021.011.000.990.980.970.96正規化處理V50頻率Pixel

6、 Subdivision for Gray Scale DITHERING 抖动动法Pixel Active Area = A+B+C+DA=2B=4C=8D(a) Graph of Pixel Subdivision0123456789101112131415 15Off1234567891011121314Gray ShadeArea AArea BArea CArea DRelative Luminance(Average over Pixel Area) Area turned on(b) Gray Shade TablePixel Column LeadsColumn Electri

7、c LeadsRow Electric Leads134214312232Pixel Row LeadsABCD Dither (Inner Frame Modulation)Dither displays more gray level than the fixed number of level as collect pixels on the screen as a fixed group and adjust brightness in the group.0 gray 1/4 gray 1/2 gray 3/4 gray 1 grayOn the contrary, Dither h

8、as a demerit that resolution shows a drop because Dither displays brightness with Group.Dither GroupFrame Rate Control, FRC : (Inter Frame Modulation) FRC divides into several frames and makes the gray level of pixel in every frame different and increases the number of gray level.FRC does not decrea

9、se resolution different from Dither, but flicker can be caused. 1stFrame 2ndFrame 3rdFrame 4thFramePixel 1Pixel 2Pixel 3Pixel 4Pixel 55/5 ON4/5 gray3/5 gray2/5 gray1/5 OFFResultTimeExample 1:o4分场就是把输入视频信号一个场周期分为四个子场，四个子场的发光时间比例为1 2 4 8，OLED在四个子场的发光有效亮度比例也为1 2 4 8。由于利用子场的组合可以得到16级灰度显示所对应的像素发光时间，所以可以实

10、现视觉上的16级灰度。o写入显示分离法见图。图中纵坐标表示由行驱动器选中的行，横坐标表示时间，阴影部分表示OLED发光的显示周期（DP）。每帧被分成四个子场（SF），四个子场中DP之比为1：2：4：8。在数据写入周期（WP），逐行往显示屏的象素单元写入显示数据，此时，所有的象素都不发光 .WPDP3DP2DP1TimeDP4SF1SF2SF3SF41帧V-Scan Dither and FRC As above mentioned, there are demerits that Dither decrease resolution and FRC causes flicker. The mo

11、re the number of gray level to be increased goes on increasing, the more these phases are deepened. So Dither and FRC are operated simultaneously, each demerit can be restricted at a minimum. Following figures show how to increase the number of gray level after conducting 1-bit with Dither and 1-bit

12、 with FRC. Dither minimized fall of resolution using 2x1 block pattern and FRC minimized the phase of flicker as let achieve between 2-frames. 0 gray 0 gray 0 gray 1 gray 1/4 gray 1st frame 2nd frame FRC+Dither gray+ =Increase in number of gray level by Dither and FRC 1st frame 2nd frame FRC+Dither

13、gray 0 gray 1 gray 1 gray 0 gray 1/2 gray 1st frame 2nd frame FRC+Dither gray 0 gray 1 gray 1 gray 1 gray 3/4 gray+ =+ =3 3 显示寻址方法显示寻址方法 Display AddressingDisplay Addressing1. Various Addressing Method Scanning Matrix Direct Grid2. CRT vs LCD Addressing Interaced vs noninterlaced 3. LCD Addressing P

14、rinciple Addressing time vs Resolution Line/ Dot inversion目的： 在极短的时间内，将显示数据加载到每一个子像素之上。IntensityModulatorVerticalDeflectionHorizontalDeflectionBEAMBEAMGrid 1Grid 2Grid 3SCREEN(anode)Filaments(cathode)Scan addressingScan addressingGrid addressingGrid addressingSequential addressingDisplay Addressing

15、MethodsAddress Technique NameTypical Pixel ElectrodeNumber of AmplifierDisplay ApplicationDirectOne lead to each pixel with a common signal return for power or a pair of leads to each pixelEach pixel defined by beam size focused on continuous screen of pixel mediaEach pixel defined by the grid hole

16、geometry: one to four grids typicallyEach pixel electronically connected between one row lead and one column leadNumber of rows multiplied by the number of columnsOne for horizontal scan deflection: one for beam intensity controlVariable, dependent upon number of grids and sub- division od each grid

17、 but fewer than in matrix addressingNumber rows plus number of columnFour or fewer alphanumeric characterCathode-ray tube and some flat CRTsVacuum fluorescence, some flat CRTs and some gas discharging techniquesPossible with all flat-panel technologies with high discrimination ratio (large nonlinear

18、ity)ScanMatrixGridEffect on luminance (1000*1000)寻址方式对显示性能的影响4 LCDs 驱动方式u直接驱动法 (Direction Addressing)：驱动电压直接施加在像素电极上按寻址方式可分为静态驱动和动态驱动： 静态驱动法 (Static Addressing) 多路驱动法 (Multiplex Addressing) 矩阵驱动，或无源驱动 主动驱动法 (Active Addressing / Multi-Line Selection)（参见文件 MLS Driver 工作原理 2-LeeYeh_1.pdf）u有源矩阵驱动法 (Acti

19、ve Matrix Addressing)两端组件 (MIM, Diode.)三端组件 (a-Si:H TFT, Ploy-Si TFT .)uPlasma Addressing (PALC)u热扫描驱动法 (雷射扫描)u光扫描驱动法 (电子速扫描如何进行液晶驱动？液晶器件原理液晶器件原理：依靠外电场（或光、热）作用于初始排列的液晶分子上，由于分子各向异性，液晶分子排列发生改变，调制通过液晶器件的外界光，产生明与暗、遮与透和变色等效果，达到显示目的。外加电压必须达到一定强度，即超过液晶显示器件的阈值并维持一定时间。牢记下列3个特点： 液晶在直流电压作用下会发生电解作用，需要交流驱动，直流分量不

20、大于几十毫伏； 液晶在电场作用下发生弹性变形，响应时间长，作用效果与峰值无关，只与外加电压有效值有关； 液晶单元是容性负载，电阻多数情况可忽略，无极性。LCDs 静态驱动LC CellXORVsVcVsigVcVsigVcVsVc-VsONOFF在像素前后电极上施加电压信号时呈显示状态，不施加电压时呈非显示状态。在相对应的一对电极间连续外加电场或不外加电场。 VsigVcVs000011101110( ( ) ) 真值表真值表一般把LCD的背极（公共端COM）连到一个异或门的输入端Vc，LCD的另一极连接异或门的输出端Vsig，工作时Vc端加上频率固定的方波信号.当控制端当控制端Vsig=“0

21、”时时，经异或后，Z端的电压将永远与Vc端相同，则LCD极板间的电位差为零，字段消隐不显示。当控制端当控制端Vsig =“1”时时，Vs端与Vc端电压反相位，则LCD极板间呈现反电压Vcs，且为2倍的电压幅值，此时字段显示。可见该字段是否显示完全取决于控制端Vsig。VXV0V0V0V00000VsigVcVcs不显示显示-V0LC CellXORVsVcVsigVcabcdefgd pabcdefgd pabcdefgd pabcdefgd pC O MC O MC O MC O MI/O (1)D 0D 1D 2D 3I/O (2)图 7-6 LED动 态 显 示 方 式abcdfeg7

22、段液晶显示器译码驱动电路abcdefgCOMABCD译码驱动LCD7段译码器XYXYP1.04514+5VOUTRCRC4047K0010.047 FCOM图 7-16 6位LCD静态显示电路 A B C Dabcdefg4056 A B C Dabcdefg4056 A B C Dabcdefg4056P1.1P1.2P1.3 A B C Dabcdefg4056 A B C Dabcdefg4056 A B C Dabcdefg4056 I1 I2 I3 I4O1O2O3O44054 I1 I2 I3 I4O1O2O3O44054P1.4P1.5P1.6P1.7ABCIBTS0S0S1S7

23、S6S5S4S3D STR 单片机DFST使用单片机的一个使用单片机的一个8 8位并行位并行I/OI/O口作为译码驱动以及口作为译码驱动以及6 6片片BCD7BCD7段译码驱动器段译码驱动器40564056、2 2片片4 4位液晶显示驱动器位液晶显示驱动器40544054、1 1片片4-164-16译码器译码器45144514和和1 1片单稳多谐振荡器片单稳多谐振荡器40474047，就组，就组成了一个完整的成了一个完整的LCDLCD显示接口电路。显示接口电路。显示程序 设单片机内 RAM20H25H六个单元为显示缓冲区，每个单元字节的低4位依次存放要显示的4位BCD码，相应的显示驱动子程序如

24、下： DISP： MOV R0，#20H ；显示缓冲单元首址送R0 MOV R3，#00H ；位选码（左边第1位）送R3 MOV R4，#06H ；位数（6位）送R4 LOOP： MOV A，R3 ；位选码送A SWAP A ；位选码转为高4位 MOV R2，A ；保存位选码（在高4位） MOV A，R0 ；取显示BCD码 ORL A，R2； 位选码（高4位）与BCD码（低4位）组合 ORL A，#80H ；ACC7置1 MOV P1，A ；输出组合码 ANL P1，#7FH ；清零P1.7位ORL P1，#80H ；P1.7再置1INC R3 ；指向下一位显示数INC R0 ；指向下一位显示

25、缓冲单元DJNZ R4，LOOP ；6位未显示完返回RET 如果需要显示小数点，则要给4054送显示小数点的相应数据。例如第三位要显示小数点，还需加入下列程序：MOV A，#64H ；高位0110将选中S6，低位0100将驱动第三位小数点ORL A，#80H ；ACC7置1MOV P1，A ；输出组合码ANL PI，#7FH ；清零P1.7位ORL PI，#80H ；P1.7再置1多路驱动 电极沿X、Y方向排列成矩阵，按顺序给X电极施加选通波形，给Y电极施加与X电极同步的选通或非选通波形，如此周而复始。通过此操作，X、Y电极交点的相素可以是独立的选态或非选态。 Matrix addressin

26、g无源驱动o 不仅选通象素上施加有电压，非选通象素上也施加了电压。为偏压比Bias=1/a。o 为使选通象素之间及非选通象素之间显示状态一致，必须要求选点电压Von一致，非选点电压Voff一致。o 为了象素在选通电压作用下被选通；而在非选通电压作用下不选通，必须要求LCD的光电性能有阈值特性，且越陡越好。o 由于材料和模式的限制，LCD电光曲线陡度总是有限的。因而反过来要求，即Von/Voff越大越好。o 经理论计算，当Duty、Bias满足以下关系时，Von/Voff取极大值。多路驱动方法的限制NBiasS.R.21:22.2331:21.7331:31.9241:31.7381:41.45

27、161:51.29321:71.2641:91.151001:111.111281:121.092001:151.082401:161.064001:171.061.0100200LCD 动态驱动o 即时间分割驱动法，又称多路驱动法。具体实施有如下几种方法：APT （平均电压法）IAPTActive addressingp 多路驱动的缺点 象素上的电压不能任意改变，否则会影响其它象素上的电压，产生串扰（crosstalk）。交叉效应无法避免，随行、列数增加，影响越大。交叉效应多路驱动法 (振幅选择驱动法, APT)1 2 3 4N 1 2 3Frame 1Frame 2F0D

28、 DT水水平平掃掃描描訊訊號號+D-D0垂垂直直影影像像訊訊號號Row 1Row 2Row 3Row NColumn 1ONOFFONOFFF+DF-DF+DF-D+D-D0+D-D0+D-D0+D-D01 2 3 4NFrame 1液晶象素电压液晶象素电压TNDNDFON221NDNDFOFF221OFFONSR NDFopt11NNSRoptAPT 驱动波形432105432106543210N=10N=20N=30=1.387=1.255=1.172=1.000=1.000=1.000IAPT 驱动波形水平電壓波形垂直電壓波形液晶畫素電壓波形0+F0+D-DF+D-D+D-(F+D)F+

29、D-D+D-(F+D)F+D+D+F0+2D0F-DF+D正極性驅動負極性驅動正極性驅動波形偏移+D負極性驅動電壓偏移+FAPT AddressingIAPT AddressingAPT 与IAPT 方式比较o APT Addressingn Low Voltage Segment Driver : 2Dn High Voltage Common Driver : 2Fo IAPT Addressingn Offset +D for Positive Polarityn Offset +F for Negative Polarityn Voltage Range of Segment Driv

30、er : F+Dn Voltage Range of Common Driver : F+D高容量多路驱动的对策(a)(b)(c)(d)(e)STN LCDs 規格11%1001%10011111090NNSRSRVVNVDBDNDFVoptlcdlcdOperation Voltage Vop :Bias Ratio : Steepness : NDNDFON221NDNDFOFF221OFFONSR NDFoptSelection Ratio : STN LCDs 驱动电压计算If Voff=2V, N=240 rows, Then : 07.114.268.23120.2248.135.

31、1240239115112222SRVONVVDNVVFVDDDNDNDNOFFVonLCDoff APT : Segment Driver : 2.96V, Common Driver : 44.40VIAPT : Segment & Common Drivers : 23.68VSTN LCDs Drivers 架构電源電壓Vlcd接地RRRR(F/D-3)RF+DFF-D2DD0.移位暫存器(Shifter Register)DCLK串列輸入訊號.閂鎖暫存器(Latch Register)LPF+D 0F-D 2D偏壓位準.DF(HLHL.H).HLHH並列輸出垂直訊號電極2D 02D2

32、DIAPT 參考電壓IAPT 驅動 ICVertical Crosstalk of STN LCDsAB1HF-D+D-DF-D+D-D+D-DFrame NFrame N+10F+D-D+D-D正極性驅動波形負極性驅動波形水平脈波垂直驅動波形液晶畫素電壓波形ABABVertical Crosstalk 的抑制 (一)1HF-D-DF-D+D-D+DFrame N0F+D+D-D正極性驅動波形水平脈波垂直驅動波形液晶畫素電壓波形ABABF-D+D+D-DF-D+D-D+D-DFrame N0F-D+D-D正極性負極性APT AddressingImprovement Addressing每兩條

33、水平線變換一次驅動電壓極性Vertical Crosstalk 的抑制 (二)1HF-D-DF-D+D-D+DFrame N0F+D+D-D正極性驅動波形水平脈波垂直驅動波形液晶畫素電壓波形ABABF-D+D-DF-D-D+D-DFrame N0F-D+DAPT AddressingImprovement Addressing000FF0正極性驅動波形採用補償驅動週期Vertical Crosstalk 的抑制 (三)1HF-D-D-DFrame N0F+D+D-D水平脈波垂直驅動波形液晶畫素電壓波形Frame NF+DAPT AddressingIAPT Addressing-(F-D)+D

34、F+D-(F+D)0F+D+2DF-DF+D0+2DF-DF+D0F-D-D-D+D-(F-D)+DF+D-(F+D)-F一條水平掃描線的掃描週期分割成兩部份，一半的掃描時間是採用正極性的驅動訊號，另一半的時間是採用負極性的驅動訊號。Horizontal Crosstalk of STN LCDs垂直驅動訊號L Line水平掃描波形液晶畫素波形(a)(b)(c)(d)ABABLHorizontal Crosstalk 的抑制垂直驅動訊號L Line水平掃描波形液晶畫素波形(a)(b)(c)(d)傳統驅動方式水平掃描補償波形補償之液晶畫素波形(e)(f)GVLABFrame Response o

35、f STN LCDs慢速液晶快速液晶+20V-20V16.6ms液晶畫素電壓光線穿透率WB主动寻址方法（多线寻址方法）Active Addressing for STN LCDs1frametk=HF1(t)F2(t)F3(t)F4(t)F5(t)ON+1ON+1ON+1OFF-1OFF-1LCDstkG1(t)G1(t)=(+F1(t)-F2(t)+F3(t)-F4(t)+F5(t)/5Active Addressing 驱动电压 NiiijjtFIctG1 tGtFtUjiij NmmmjjiitAINNtGtANNtFNNFOFF12112121Nc1If Voff=2V, N=240

36、rows, Then :F = 0.730 X 2V = 1.460V|G| = 0.954 X 2V = 21.909VOutput Range of Segment Driver is about 44V.Common Driver of Common Driver is about 3V.Segment Voltage of Active Addressing不同的元素相異數目 D 所對應的垂直驅動電壓位階N01234567892-10+13-1-1/3+1/3+14-1-1/20+1/2+15-1-3/5-1/5+1/5 +3/5+16-1-4/6-2/60+2/6 +2/6+17-1

37、-5/7-3/7-1/7+1/7 +3/7 +5/7+18-1-6/8-4/8-2/80+2/8 +4/8 +6/8+19-1-7/9-5/9-3/9-1/9+1/9 +3/9 +5/9 +7/9+1表一. 主動驅動法的垂直驅動電壓位階分佈 0112122212121VNFNNNVVNTDNTDNNNTDTDNNNTATINNtGOOkjkjkjkjNmkmkmjjDDDDDDActive Addressing 的矩阵运算列向量（Column）時間（Time）行向量（Row）Bit-Map Image MatrixRow Function Matrix時間（Time）列（Column）Colu

38、mn Voltage MatrixtGtGtGtGtGtGtGtGtGtGIFIIIIIIIIItFtFtFtFtFtFtFtFtFIFjijiijiDDDDDDDDDDDDDDDDDDD333231232221131211333231232221131211333231232221131211矩阵运算方式行（Row）行向量（Row）列向量（Column）Bit-Map Image MatrixRow Vector時間（Time）列（Column）Time = Dtk行向量（Row）列向量（Column）第j列Row Function Matrix時間（Time）列（Column）Column

39、 Vector垂直序列運算Column Sequential時間序列運算Time SequentialColumn Sequential 硬件结构 NM圖框記憶體 NM圖框記憶體影像資訊 輸入IjNXOR陣列N加法邏輯陣列NM STN LCDs液晶層間隙4.5um液晶材料：低黏滯係數水平驅動函數唯讀記憶體Row Function ROMNSTN LCDs垂直驅動晶片TFT LCDs 垂直驅動晶片1轉2多工器2轉1解多工器Time Sequential 硬件结构 NM圖框記憶體 NM圖框記憶體影像資訊 輸入IjNXOR陣列N加法邏輯陣列水平驅動函數唯讀記憶體Row Function ROMN1轉

40、2多工器2轉1解多工器NM圖框緩衝記憶體NM圖框緩衝記憶體NM STN LCDs液晶層間隙4.5um液晶材料：低黏滯係數STN LCDs垂直驅動晶片TFT LCDs 垂直驅動晶片N有源矩阵驱动o何谓TFToTFT工作原理及工作特性oTFT LCD结构 （详见TFT LCD介绍）oTFT LCD等效电路oTFT驱动原理o像素充、放电过程Thin film transistor (TFT)Ibaraki, Toshiba, SID02 SeminarTFT 工作原理及工作特性Principle of TFT OperationField EffectGateSourceDrain-Electric

41、 charges are induced to the channel by gate voltage. (Accumulation)- Induced electric charges mostly exist in the Trap of band gap different from MOS and cannot contribute to conduction.)(22xdxVd)()(yVVVCyQthgoVdinfeVdininfVdfddVQLWdVQQQLWdVQLWI00000)(# Partial electrics charge among induced ones co

42、ntribute to conduction(Fermi levelpinning)a-Si TFT Electric Characteristics Transfer PropertiesOutput PropertiesParasitic Capacitance of a TFTCgs vs VgCgd vs VgCgs vs VdStray Capacitance is important.- Overlap of gate electrode and source(or drain) electrode- Fringe effect Cgs turn off: considering

43、the isolated film and a-Si:H silicon layer turn on: considering only the isolated film due to form of channel Mostly Vg functionCgd: Vg and Vd functionsTFT StabilityBias Effect - If Voltage is stressed on the gate of a-Si:H TFT, the transfer properties are changed. Stressing + voltage : Transfer pro

44、perties curve : + shift (increase of Vth) Stressing - voltage : Transfer properties curve : - shift (decrease of V the)Reason: Transfer trapping on the isolated film/ interface : Defect is formed on the channelQ) Do you understand Shift mechanism of properties curve?oWhen a TFT panel is operated und

45、er real-world conditions, the gate voltage is set at either 20 V for switch-on, or at -5 V for switch-off. Under these operating conditions, the a-Si TFT is a good switching device with an on/off current ratio larger than 106. TFT LCD等效电路o 单个像素等效电路o 多像素等效电路Equivalent circuit of LCEquivalent circuit

46、of a TFTVertical structure of a unit pixel and its equivalent circuit TFT LCDs 等效电路Row DriversColumn DriverTFT 驱动LCD原理TFT 驱动LCD原理TFT LCD 等效電路 CLC約 0.1pF 0.3pF, 於掃描時無法單獨維持穩定電壓值, 故必須外加一儲存電容Cs , 以保持畫面穩定(不閃爍)。Row DriversColumn DriverCLCCsa-Si:H TFT 之開關操作(1) Vgs Vth，通道通道將將感應出電子感應出電子，源極源極(S)與與汲極汲極(D)導通導通。(2) Vgs Vth：信号读取DSGGDSCLCcomG GD DS SV VGSGS V VththV VSDSDDSGTFT元件在栅极(G)施加适当电压(VGS阈值电压Vth),使通道(a-Si)感应导电沟道而使得栅极(S)漏极(D)导通93TFT原理(2)VgsVthON,当VGSVthOFF。94