EDA技术及应用课程设计_交通灯

1、TAIYUANUNIVEKSITYOFTECHNOLO<SY课程设计课程名称：EDA技术与FPGA应用设计课设题目：交通灯控制实验地点：电机馆跨越机房专业班级：电信1001班学号：2010001207学生姓名：吴清涛指导教师：张文爱2013年6月10日课设题目：交通灯控制器、设计要求设计一个由一条主干道和一条支干道的十字路口的交通灯控制器，具体要求如下：(1) 主、支干道各设有一个绿、黄、红指示灯，两个显示数码管。(2) 主干道处于常允许通行状态，而支干道有车来才允许通行。当主干道允许通行亮绿灯时，支干道亮红灯。而支干道允许通行亮绿灯时，主干道亮红灯。(3) 当主、支道均有车时，两者交替

2、允许通行，主干道每次放行45s,支干道每次放行25s,由亮绿灯变成亮红灯转换时，先亮5s的黄灯作为过渡，并进行减计时显示。二、设计方案(1)设置支干道有车开关SB。系统中要求有45秒、25秒和5秒三种定时信号，需要设计三种相应的计时显示电路。计时方法为倒计时。定时的起始信号由主控电路给出，定时时间结束的信号输入到主控电路。(3)主控制电路的输入信号一方面来白车辆检测，另一方面来白45秒、25秒、5秒的定时到信号；输出有计时启动信号(置计数起始值)和红绿灯驱动信巨状态转移如图所示，用状态机描述。45s未到或5s未到模块结构如下图:1、将各部分VHDL参考程序输入软件，编译使其各个通过1、交通灯主

3、控制器模块JTDKZ:LIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;ENTITYJTDKZISPORT(CLK,SB,cnt,RST:INSTD_LOGIC;en,MR,MY,MG,BR,BY,BG:OUTSTD_LOGIC;din:outSTD_LOGIC_vector(7downto0);ENDENTITYJTDKZ;ARCHITECTUREARTOFJTDKZISComponentCNT45SISPORT(SB,CLK,EN45:INSTD_LOGIC;DOUT45M,DOUT45B:OUTSTD_LOGIC_VECTOR(7DOWNTO0);Endcom

4、ponentComponentCNT05SISPORT(CLK,EN05M,EN05B:INSTD_LOGIC;DOUT5:OUTSTD_LOGIC_VECTOR(7DOWNTO0);EndcomponentComponentCNT25SISPORT(SB,SM,CLK,EN25:INSTD_LOGIC;DOUT25M,DOUT25B:OUTSTD_LOGIC_VECTOR(7DOWNTO0);EndcomponentComponentSHKZISPORT(EN45,EN25,EN05M,EN05B:INSTD_LOGIC;AIN45M,AIN45B;INSTD_LOGIC_VECTOR(7D

5、OWNTO0);AIN25M,AIN25B,AIN05;INSTD_LOGIC_VECTOR(7DOWNTO0);DOUTM,DOUTB:OUTSTD_LOGIC_VECTOR(7DOWNTO0);EndcomponentTYPESTATE_TYPEIS(A,B,C,D);SIGNALp_STATE,n_state:STATE_TYPE;BEGINreg:PROCESS(CLK,rst)ISBEGINifrst='1'thenp_STATE<=A;ELSIF(CLK'EVENTANDCLK='1')THENp_STATE<=n_state;E

6、NDIF;endprocessreg;com:PROCESS(sb,cnt,p_state)beginCASEp_STATEISWHENA=>MR<='1'MY<='1'MG<='0'BR<='0'BY<='1'BG<='1'IF(SBANDcnt)='1'THENn_STATE<=B;din<="00000101"EN<='0'ELSEn_STATE<=A;din<=&quo

7、t;01000101"EN<='1'ENDIF;WHENB=>MR<='1'MY<='0'MG<='1'BR<='0'BY<='1'BG<='1'IFcnt='1'THENn_STATE<=C;din<="00100101"EN<='0'ELSEn_STATE<=B;din<="01000101"EN<='1&#

8、39;ENDIF;WHENC=>MR<='0'MY<='1'MG<='1'BR<='1'BY<='1'BG<='0'IFcnt='1'THENn_STATE<=D;din<="00000101"EN<='0'ELSEn_STATE<=C;din<="01000101"EN<='1'ENDIF;WHEND=>MR<='

9、0'MY<='1'MG<='1'BR<='1'BY<='0'BG<='1'IFcnt='1'THENn_STATE<=A;din<="01000101"EN<='0'ELSEn_STATE<=D;din<="0100010T'EN<='1'ENDIF;ENDCASE;ENDPROCESScom;ENDARCHITECTUREART;W讷->!CA

10、65;kWAjfc*<z.tc_300BfeSourcelargfftSvnthBSiz®HDL驯幅tQpttorSntfowt?ebfiBP至*2电lam；桐jtJa2_鼻|CAPNUM2、45S计时译码模块CNT45S:LIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;USEIEEE.STD_LOGIC_UNSIGNED.ALL;ENTITYCNT45SISPORT(SB,CLK,EN45:INSTD_LOGIC;DOUT45M,DOUT45B:OUTSTD_LOGIC_VECTOR(7DOWNTO0);ENDCNT45S;ARCHITECTUR

11、EARTOFCNT45SISSIGNALCNT6B:STD_LOGIC_VECTOR(5DOWNTO0);BEGINPROCESS(SB,CLK,EN45)ISBEGINIFSB='0'THENCNT6B<=CNT6B-CNT6B-1;ELSIF(CLK'EVENTANDCLK='1')THENIFEN45='1'THENCNT6B<=CNT6B+1;ELSIFEN45='0'THENCNT6B<=CNT6B-CNT6B-1;ENDIF;ENDIF;ENDPROCESS;PROCESS(CNT6B)ISB

12、EGINCASECNT6BISWHEN”000000”=>DOUT45M<=”0100010T'DOUT45B<=”01010000”;WHEN”00000T'=>DOUT45M<=”01000100”;DOUT45B<=”0100100T'WHEN”000010”=>DOUT45M<=”0100001T'DOUT45B<=”01001000”;WHEN”00001T'=>DOUT45M<=”01000010”;DOUT45B<=”0100011T'WHEN”000100”=

13、>DOUT45M<=”0100000T'DOUT45B<=”01000110”;WHEN”00010T'=>DOUT45M<=”01000000”;DOUT45B<=”0100010T'WHEN”000110”=>DOUT45M<=”0011100T'DOUT45B<=”01000100”;WHEN”00011T'=>DOUT45M<=”00111000”;DOUT45B<=”0100001T'WHEN”001000”=>DOUT45M<=”0011011T

14、9;DOUT45B<=”01000010”;WHEN”00100T'=>DOUT45M<=”00110110”;DOUT45B<=”0100000T'WHEN”001010”=>DOUT45M<=”0011010T'DOUT45B<=”01000000”;WHEN”00101T'=>DOUT45M<=”00110100”;DOUT45B<=”0110100T'WHEN”001100”=>DOUT45M<=”0011001T'DOUT45B<=”00111000”;WHE

15、N”00110T'=>DOUT45M<=”00110010”;DOUT45B<=”0011011T'WHEN”001110”=>DOUT45M<=”0011000T'DOUT45B<=”00110110”;WHEN”00111T'=>DOUT45M<=”00110000”;DOUT45B<=”0011010T'WHEN”010000”=>DOUT45M<=”0010100T'DOUT45B<=”00110100”;WHEN”01000T'=>DOUT45M<

16、;=”00101000”;DOUT45B<=”0011001T'WHEN”010010”=>DOUT45M<=”0010011T'DOUT45B<=”00110010”;WHEN”01001T'=>DOUT45M<=”00100110”;DOUT45B<=”0011000T'WHEN”010100”=>DOUT45M<=”0010010T'DOUT45B<=”00110000”;WHEN”01010T'=>DOUT45M<=”00100100”;DOUT45B<=”00

17、10100T'WHEN”010110”=>DOUT45M<=”0010001T'DOUT45B<=”00101000”;WHEN”01011T'=>DOUT45M<=”00100010”;DOUT45B<=”0010011T'WHEN”011000”=>DOUT45M<=”0010000T'DOUT45B<=”00100110”;WHEN”01100T'=>DOUT45M<=”00100000”;DOUT45B<=”0010010T'WHEN”011010”=>

18、DOUT45M<=”0001100T'DOUT45B<=”00100100”;WHEN”01101T'=>DOUT45M<=”00011000”;DOUT45B<=”0010001T'WHEN”011100”=>DOUT45M<=”0001011T'DOUT45B<=”00100010”;WHEN”01110T'=>DOUT45M<=”00010110”;DOUT45B<=”0010000T'WHEN”011110”=>DOUT45M<=”0001010T'DO

19、UT45B<=”00100000”;WHEN”01111T'=>DOUT45M<=”00010100”;DOUT45B<=”0001100T'WHEN”100000”=>DOUT45M<=”0001001T'DOUT45B<=”00011000”;WHEN”10000T'=>DOUT45M<=”00010010”;DOUT45B<=”0001011T'WHEN”100010”=>DOUT45M<=”0001000T'DOUT45B<=”00010110”;WHEN”10

20、001T'=>DOUT45M<=”00010000”;DOUT45B<=”0001010T'WHEN”100100”=>DOUT45M<=”0000100T'DOUT45B<=”00010100”;WHEN”10010T'=>DOUT45M<=”00001000”;DOUT45B<=”0001001T'WHEN”100110”=>DOUT45M<=”0000011T'DOUT45B<=”00010010”；WHEN"10011T'=>DOUT45M&l

21、t;="00000110"DOUT45B<="0001000T'WHEN”101000”=>DOUT45M<=”0000010T'DOUT45B<=”00010000”；WHEN"10100T'=>DOUT45M<="00000100"DOUT45B<="0000100T'WHEN"101010"=>DOUT45M<="0000001T'DOUT45B<="00001000"W

22、HEN"10101T'=>DOUT45M<="00000010"DOUT45B<="0000011T'WHEN"101100"=>DOUT45M<="0000000T'DOUT45B<="00000110"WHENOTHERS=>DOUT45M<=”00000000”;DOUT45B<=”00000000”;ENDCASE;ENDPROCESS;END;EieViiewSourceTargetSnthesreHDLAnaiyrt

23、OptionsWindowHefcfi9PQII0%JQQ!11®I®CAPNUM3、5S计时译码模块CNT5S:LIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;USEIEEE.STD_LOGIC_UNSIGNED.ALL;ENTITYCNT05SISPORT(CLK,EN05M,EN05B:INSTD_LOGIC;DOUT5:OUTSTD_LOGIC_VECTOR(7DOWNTO0);ENDCNT05S;ARCHITECTUREARTOFCNT05SISSIGNALCNT3B:STD_LOGIC_VECTOR(2DOWNTO0);BEGINP

24、ROCESS(CLK,EN05M,EN05B)ISBEGINIF(CLK'EVENTANDCLK='1')THENIFEN05M='1'THENCNT3B<=CNT3B+1;ELSIFEN05B='1'THENCNT3B<=CNT3B+1;ELSIFEN05B='0'THENCNT3B<=CNT3B-CNT3B-1;ENDIF;ENDIF;ENDPROCESS;PROCESS(CNT3B)BEGINCASECNT3BISWHEN"000"=>DOUT5<="000

25、00101"WHEN"001"=>DOUT5<="00000100"WHEN"010"=>DOUT5<="00000011"WHEN"011"=>DOUT5<="00000010"WHEN"100"=>DOUT5<="00000001"WHENOTHERS=>DOUT5<="00000000"ENDCASE;ENDPROCESS;END;4、25S

26、计时译码模块CNT25S:LIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;USEIEEE.STD_LOGIC_UNSIGNED.ALL;ENTITYCNT25SISPORT(SB,SM,CLK,EN25:INSTD_LOGIC;DOUT25M,DOUT25B:OUTSTD_LOGIC_VECTOR(7DOWNTO0);ENDENTITYCNT25S;ARCHITECTUREARTOFCNT25SISSIGNALCNT5B:STD_LOGIC_VECTOR(4DOWNTO0);BEGINPROCESS(SB,SM,CLK,EN25)ISBEGINIFSB='

27、0'THENCNT5B<=CNT5B-CNT5B-1;ELSIFSM='0'THENCNT5B<=CNT5B-CNT5B-1;ELSIF(CLK'EVENTANDCLK='1')THENIFEN25='1'THENCNT5B<=CNT5B+1;ELSIFEN25='0'THENCNT5B<=CNT5B-CNT5B-1;ENDIF;ENDIF;ENDPROCESS;PROCESS(CNT5B)ISBEGINCASECNT5BISWHEN"00000"=>DOUNT25

28、B<="00100101"DOUT25M<="00110000"WHEN"00001"=>DOUNT25B<="00100100"DOUT25M<="00101001"WHEN"00010"=>DOUNT25B<="00100011"DOUT25M<="00101000"WHEN"00011"=>DOUNT25B<="00100010"D

29、OUT25M<="00100111"WHEN"00100"=>DOUNT25B<="00100001"DOUT25M<="00100110"WHEN"00101"=>DOUNT25B<="00100000"DOUT25M<="00100101"WHEN"00110"=>DOUNT25B<="00011001"DOUT25M<="00100100&q

30、uot;WHEN"00111"=>DOUNT25B<="00011000"DOUT25M<="00100011"WHEN"01000"=>DOUNT25B<="00010111"DOUT25M<="00100010"WHEN"01001"=>DOUNT25B<="00010110"DOUT25M<="00100001"WHEN"01010"=&

31、gt;DOUNT25B<="00010101"DOUT25M<="00100000"WHEN"01011"=>DOUNT25B<="00010100"DOUT25M<="00011001"WHEN"01100"=>DOUNT25B<="00010011"DOUT25M<="00011000"WHEN"01101"=>DOUNT25B<="00010

32、010"DOUT25M<="00010111"WHEN"01110"=>DOUNT25B<="00010001"DOUT25M<="00010110"WHEN"01111"=>DOUNT25B<="00010000"DOUT25M<="00010101"WHEN"10000"=>DOUNT25B<="00001001"DOUT25M<="

33、00010100"WHEN"10001"=>DOUNT25B<="00001000"DOUT25M<="00010011"WHEN"10010"=>DOUNT25B<="00000111"DOUT25M<="00010010"WHEN"10011"=>DOUNT25B<="00000110"DOUT25M<="00010001"WHEN"101

34、00"=>DOUNT25B<="00000101"DOUT25M<="00010000"WHEN"10101"=>DOUNT25B<="00000100"DOUT25M<="00001001"WHEN"10110"=>DOUNT25B<="00000011"DOUT25M<="00001000"WHEN"10111"=>DOUNT25B<=&

35、quot;00000010"DOUT25M<="00000111"WHEN"11000"=>DOUNT25B<="00000001"DOUT25M<="00000110"WHENOTHERS=>DOUNT25B<="00000000"DOUT25M<="00000000"ENDCASE;ENDPROCESS;END;oSTJtfv-O:fDADetJGcnt255.tEAOOElsJ£l0wSourcelaroet

36、SynthesizeHDLanalystQpttore四rriowUeb建PE9司*剧畸£!危|®£>|学|翁豹少企审拿mtES总u_CAPNUM5、显示控制模块XSKZ:LIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;USEIEEE.STD_LOGIC_UNSIGNED.ALL;ENTITYSHKZISPORT(EN45,EN25,EN05M,EN05B:INSTD_LOGIC;AIN45M,AIN45B;INSTD_LOGIC_VECTOR(7DOWNTO0);AIN25M,AIN25B,AIN05;INSTD_LOGIC_VECTOR(7DOWNTO0);DOUTM,DOUTB:OUTSTD_LOGIC_VECTOR(7DOWNTO0);ENDSHKZ;ARCHITECTUREA