数字时钟外文翻译

1、 外文资料翻译L ED using digital tube digital display its high-brightness, indicating the advantages of intuitive intelligence is widely used in areas such as equipment and household appliances. AT89C52This article describes a single-chip microcomputer as the core, to a total of anode high-brightness LED L

2、 ED as a display composed of seven figures show that the practical design of multi-function electronic clocks, the clock shows a week, hour, minute, second, it can be switched to year, month, day showed that the whole point of music at the same time and from time to time the alarm time and other fun

3、ctions can also be used for electronic stopwatch.Clock circuit is the heart of the computer, which controls the rhythm of the work of the computer is through the completion of complex sequential circuits function in different directions.Clock, since it was invented that day on, people's lives ha

4、s become an indispensable tool, especially in this era of efficient, the clock is in the human production and living, learning and other fields is widely. However, with the passage of time, people not only to the requirements of the clock is getting higher and higher precision, and functional requir

5、ements for the clock more and more, the clock has not only a tool used to display time, in many practical applications It also needs to be able to achieve more other functions. Features such as alarm clock, calendar display, temperature measurement function, humidity measurements, voltage measuremen

6、ts, frequency measurements, have been under-voltage alarm function. Digital clocks to the people's production and life has brought great convenience, but also greatly expands the time feature the original clocks. Such as regular auto-alarm, Automatic time-ling, time process automation, from time

7、 to time broadcast, from closed-circuit automatic lights, oven timer switch, on-off power equipment, electrical and even a variety of timing is automatically enabled, all of which are based on digital clocks and watches based. It can be said that the design of the significance of multi-function Digi

8、tal Clock Digital Clock is not just itself, a greater significance of the multi-function digital clock in a number of real-time control systems. In many practical applications, as long as the digital clock circuit of the programs and hardware to a certain degree of modification could be useful for r

9、eal-time control system, which applied to the actual work and production to. Thus, digital clock and to expand its applications, has a very practical significance. With the development of human civilization, science and technology, there is the request of the clock continues to improve. Clock has no

10、t only seen as a tool to display the time, in many practical applications also need to be able to achieve more other functions. High-precision, multifunction, small size, low power consumption, is the development trend of the modern clock. In this trend, digital clock, multifunction clock has become

11、 the modern design of the production of research-led direction. This article is based on this design direction for the control of a single-chip core design requirements of a multi-function indicators in line with the digital clock. The design is based on the principle of single-chip technology to ch

12、ip AT89C52single-chip microcomputer as the core controller, through the production of hardware and software procedures for the preparation, design to produce a multi-functional digital clock system. The clock system mainly by clock module, alarm module, the ambient temperature detection module, liqu

13、id crystal display module, control module and the keyboard signal prompted module. System is simple and clear user interface that can 4V 7V DC power under normal operation. Able to accurately display time (display format hh: mm: seconds seconds, 24-hour system), may be time to adjust at any time, wi

14、th clock time settings, alarm on / off, only to make functions, where the clock to measure the ambient temperature and displayed. Hardware and software design into the guiding ideology, give full play to the single-chip features, most of the functions through software programming to achieve, the cir

15、cuit is simple and clear, high system stability. At the same time, the clock system also has the power of small, low cost, and highly practical. System components as a result of less use, single-chip occupied by the I / O port not more than, the system has a certain degree of scalability.Clock desig

16、n is no theory of discrete logic, programmable logic, or using full-custom silicon devices of any digital design, in order to successfully operate and reliable clock is crucial. Poor design of the clock in the limits of temperature, voltage deviation or the manufacturing process will result in the c

17、ase wrong, and debugging difficult, spending a lot. In the design of FPGA / CPLD clock when several types of commonly used. Clock can be divided into the following four types: global clock, clock gating, multi-level logic clock clock and volatility. Multi-clock system to include the above-mentioned

18、four types of any combination of the clock. No matter what methods are the real circuit clock tree can not achieve the ideal assumption that the clock, so we must be based on an ideal clock, the clock real work to build a model to analyze the circuit, so as to make the circuit performance and the pr

19、actical work as expected . Clock in the actual model, we have to consider the spread of clock-tree skew, vertical jump and absolute bias and other uncertainties. To register, the clock was working along the arrival of the data terminal when it should have been stable, so as to ensure that the work a

20、long the sampling clock to the accuracy of the data, this data preparation time that we call set-up time (setup time). Data should also be working along the clock to maintain over a period of time, this period of time known as the hold time (hold time). Global clock for a design project, the global

21、clock (or clock synchronous) is the simplest and most predictable clock. In the PLD / FPGA design of the clock the best options are: by a dedicated global clock input pins of a single master clock-driven clock design projects to each flip-flop. As long as possible should be used in the design of glo

22、bal clock projects. PLD / FPGA has a dedicated global clock pins, the device is directly connected to each register. Global clock to provide such a device in the shortest possible delay to the output clock. Clock-gated in many applications, the entire design of the overall use of external clock is n

23、ot possible or practical. With the product of PLD logic array clock (that is, the clock is generated by the logic), to allow arbitrary function alone all trigger clock. However, when you use the array clock, the clock should be carefully analyzed the function, in order to avoid glitches. Usually con

24、stitute the array clock clock-gated. Clock gating often interface with the microprocessor, and used the address to write to control the pulse line. However, when using combination of flip-flop when the clock function, usually there is a clock-gated. If the following conditions, such as clock gating

25、can be as reliable as global clock work: Drive the clock logic must contain only one "and" the door or a "or" gate. If any additional work in some state of logic, the competition will be the burr. A logic gate input as the actual clock, and the logic gate must be of all other inp

26、ut as the address or control lines, in relation to their compliance with the establishment and maintenance of clock time bound. Multi-level logic generated clock when the clock-gating logic of the combination of more than one (or more than the individual "and" doors or "or" gate)

27、, the evidence of the reliability of the design of the project has become very difficult. Even if the prototype or simulation results show that there is no static dangerous, but in fact the risk may still exist. In general, we should not use multi-level combinational logic to clock the flip-flop in

28、the PLD design. Traveling-wave clock clock another popular use of traveling-wave circuit is the clock, that is, the output of a flip-flop used as a clock input of another flip-flop. If careful design, traveling-wave clock can be the same as the global clock to work reliably. However, the traveling-w

29、ave clock made from time to time with the calculation of the circuit becomes very complicated. Line-wave traveling-wave clock flip-flop of the chain have a greater clock time between the offset and exceed the worst case the set-up time, hold time and clock to the output circuit of the delay, allowin

30、g the system to the actual slowed down. Multi-clock system, many system requirements within the same multi-PLD clock. The most common example is the two asynchronous interfaces between microprocessors, or microprocessors and asynchronous communication channel interface. As the clock signal between t

31、he two requirements to establish and maintain a certain time, so that the above application from time to time the introduction of additional constraints. They also requested that some asynchronous synchronization signal. In many applications, only the synchronization of asynchronous signals is not e

32、nough, when the system of two or more non-homologous clock, the data it is difficult to establish and maintain the time to be assured that we will face the complex matter of time . The best way is to all non-homologous clock synchronization. PLD internal use of the lock loop (PLL or DLL) is a very g

33、ood, but not all of PLD with a PLL, DLL, and chip PLL with most expensive, so unless there are special requirements, the general occasions PLL can not use with the PLD.At this time we need to take to enable the use of the D flip-flop-side, and the introduction of a high-frequency clock. 采用L ED 数码管的数

34、字显示以其亮度高、显示直观等优点被广泛应用于智能仪器及家用电器等领域. 本文介绍一种以AT89C52单片机为核心,以共阳极高亮度L ED 数码管作为显示器件组成7 位数字显示的实用多功能电子时钟的设计,该时钟可显示星期、时、分、秒,也可切换为年、月、日显示,同时具有整点音乐报时及定时闹钟等功能,也可作电子秒表使用。时钟电路是计算机的心脏, 它控制着计算机的工作节奏就是通过复杂的时序电路完成不同的指令功能的。时钟，自从它被发明的那天起，就成为人们生活中必不可少的一种工具，尤其是在现在这个讲究效率的年代，时钟更是在人类生产、生活、学习等多个领域得到广泛的应用。然而随着时间的推移，人们不仅对于时钟精

35、度的要求越来越高，而且对于时钟功能的要求也越来越多，时钟已不仅仅是一种用来显示时间的工具，在很多实际应用中它还需要能够实现更多其它的功能。诸如闹钟功能、日历显示功能、温度测量功能、湿度测量功能、电压测量功能、频率测量功能、过欠压报警功能等。钟表的数字化给人们的生产生活带来了极大的方便，而且大大地扩展了钟表原先的报时功能。诸如定时自动报警、按时自动打铃、时间程序自动控制、定时广播、自动起闭路灯、定时开关烘箱、通断动力设备、甚至各种定时电气的自动启用等，所有这些，都是以钟表数字化为基础的。可以说，设计多功能数字时钟的意义已不只在于数字时钟本身，更大的意义在于多功能数字时钟在许多实时控制系统中的应用

36、。在很多实际应用中，只要对数字时钟的程序和硬件电路加以一定的修改，便可以得到实时控制的实用系统，从而应用到实际工作与生产中去。因此，研究数字时钟及扩大其应用，有着非常现实的意义。随着人类科技文明的发展，人们对于时钟的要求在不断地提高。时钟已不仅仅被看成一种用来显示时间的工具，在很多实际应用中它还需要能够实现更多其它的功能。高精度、多功能、小体积、低功耗，是现代时钟发展的趋势。在这种趋势下，时钟的数字化、多功能化已经成为现代时钟生产研究的主导设计方向。本文正是基于这种设计方向，以单片机为控制核心，设计制作一个符合指标要求的多功能数字时钟。本设计基于单片机技术原理，以单片机芯片AT89C52作为核

37、心控制器，通过硬件电路的制作以及软件程序的编制，设计制作出一个多功能数字时钟系统。该时钟系统主要由时钟模块、闹钟模块、环境温度检测模块、液晶显示模块、键盘控制模块以及信号提示模块组成。系统具有简单清晰的操作界面，能在4V7V直流电源下正常工作。能够准确显示时间（显示格式为时时：分分：秒秒，24小时制），可随时进行时间调整，具有闹钟时间设置、闹钟开/关、止闹功能，能够对时钟所在的环境温度进行测量并显示。设计以硬件软件化为指导思想，充分发挥单片机功能，大部分功能通过软件编程来实现，电路简单明了，系统稳定性高。同时，该时钟系统还具有功耗小、成本低的特点，具有很强的实用性。由于系统所用元器件较少，单片

38、机所被占用的I/O口不多，因此系统具有一定的可扩展性。时钟设计无沦是用离散逻辑、可编程逻辑，还是用全定制硅器件实现的任何数字设计，为了成功地操作，可靠的时钟是非常关键的。设计不良的时钟在极限的温度、电压或制造工艺的偏差情况下将导致错误的行为，并且调试困难、花销很大。在设计FPGA/CPLD时通常采用几种时钟类型。时钟可分为如下四种类型：全局时钟、门控时钟、多级逻辑时钟和波动式时钟。多时钟系统能够包括上述四种时钟类型的任意组合。无论采用何种方式，电路中真实的时钟树也无法达到假定的理想时钟，因此我们必须依据理想时钟，建立一个实际工作时钟模型来分析电路，这样才可以使得电路的实际工作效果和预期的一样。在实际的时钟模型中，我们要考虑时钟树传播中的偏斜、跳变和