系统级芯片论文：AVS视频解码芯片功能验证平台的研究与实现

1、系统级芯片论文：AVS视频解码芯片功能验证平台的研究与实现【中文摘要】随着集成电路技术的不断发展,市场对芯片产品提出了更高的要求,它们必须拥有更强的功能并且体积更小、功耗更低、价格更合理才能在激烈的市场竞争中获得一席之地。在基于IP重用的SoC设计已经成为芯片设计业主流的今天,SoC验证工作需要投入的时间一般占到整个开发周期的70%,验证难度是传统芯片的3到5倍,传统的验证方法和技术已经不能满足当前的需要,验证已成为当前业界最有挑战性、最具研究价值的课题之一。本文首先介绍了功能验证的地位以及功能验证的一般方法,结合实际情况分析了功能验证的发展趋势,并在功能验证平台设计中加以实践；在分析了AVS

2、视频解码芯片的架构和接口的基础上完成了其功能验证平台的设计工作；在验证平台的实际应用方面,对芯片整体的功能验证策略做了分析,在集成验证中采用了受约束随机测试与定向测试相结合的激励生成方法、综合考虑代码覆盖率与功能覆盖率的覆盖率收敛方法,以及以覆盖率为导向、覆盖率结果反馈测试端的验证流程。为了提高验证的效率,使用基于SystemVerilog语言的模块参考模型代替设计尚未设计完备的子模块,从而在模块级验证未完成的情况下启动集成验证工作。所设计的功能验证平台结合验证方案在实际工作中取得了良好的效果,比传统的验证平台和验证方案具有更高的验证效率和代码可重用率,缩短了芯片的开发周期。最后,本文对所进行

3、的工作进行了简单总结,归纳了不足之处以及进一步工作的要点。【英文摘要】With the development of integrated circuit technology, the market puts forward higher requirement about chips, they must be multifunction but more smaller,and have lower power consumption with the more reasonable price to gain a foothold in the fierce competition o

4、f market. Today IPreuse-based SoC has become the mainstream in chip design field, time-consuming SoC verification normally account for 70% of the entire design cycle, whose verification difficulties are 3 to 5 times of the traditional chip. So traditional verification methods can no longer meet curr

5、ent needs, verification has become one of the most challenging and valuabletopics.Firstly,this paper discussed the position and the common methods of functional verification, analyzes thedevelopment trend of functional verification and applied them in practice.Then on the basis of the analysis of th

6、e AVS video decoder chip architecture and interfaces, an appropriative functional testbench was proposed. When it comes to the practical application of testbench, we analyzed theverification strategies of the entire chip and use the stimulus generation strategy-a combination of constraint-based rand

7、om testing and directed testing, the coverage convergencestrategy considering the code coverage and functional coverage, and the coverage-oriented verification flow with results back to the test side in the integrate verification. In order to improve the verification efficiency, the SystemVerilog-ba

8、sed reference modules replaced the modules whose designs were not complete yet, so that integrate verification could be activated in the case of uncompleted verification at the block level. Combined with the verification strategy the functionaltestbench showed its excellent performance, more verific

9、ation efficiency and more code reuse compared to traditionaltestbench, thus the design cycle time was reduced. Finally, the paper carried out a brief summary of the entire work, and summarized the shortcomings and the main points of further work.【关键词】系统级芯片 验证 SystemVerilog 功能验证平台【英文关键词】System-on-Chi

10、p VerificationSystemVerilog Functional Testbench【目录】AVS视频解码芯片功能验证平台的研究与实现8-911-1714-16业化15-16ABSTRACT9符号说明10-11摘要第一章 绪论1.2 课题来源1.2.2 AVS标准的产第1.1 研究背景及意义11-141.2.1 AVS标准概述14-151.3 论文的主要内容及论文结构16-17二章 SOC功能验证技术17-3317-20证法20-2121-22术25-282.1 SOC设计流程与验证2.2.1 黑盒验2.2 功能验证方法与技术20-292.2.2 白盒验证法212.2.4 动态验证

11、技术22-252.2.3 灰盒验证法2.2.5 静态验证技2.3 功能2.2.6 软硬件协同验证技术28-292.3.1 验证层次的抽象化验证的发展趋势29-33302.3.2 验证过程的自动化30-312.3.3 验证资源的重用化31-3232-3333-582.3.4 激励的随机化及验证的并行化第三章 AVS视频解码芯片功能验证平台设计3.1 AVS视频解码芯片分析33-373.2.1 验证语言38-393.2 验证语言3.2.2 验证3.3.1 传统和验证工具37-40工具39-403.3 功能验证平台架构40-45验证平台的结构40-4141-45结构45-46序48-513.3.2 分层次的验证平台3.4.1 顶层文件3.4.3 验证平台程3.5 验证平台的3.4 功能验证平台设计45-553.4.2 接口设计46-483.4.4 验证环境组件51-55工作流程55-5858-7160-6163-6565-6769-7