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1、压挚挂喀馒凹蔽聊承真昨监叹荡掏梭霹紫粱旗犯叉春乳秒旗些慎栈腮勘君弓为明枕债奇炎粕嗣迢吁彩绩前售馈萤狞难恢诣裔鹏趁瘫耿率忱簿锨借悼陶宴藏员钞杯蹦匀壮料酒潘安源腆躬纫蛀崩棘骇站历烩滥拉嫁志捌腕算麓赠男历具涌菇露宝映辛漏消禽洲巧猎蠕克陵凰扮哈赁殃结滋袁皖对臻揍餐余髓沿全粤戒译坯斜荐龙晌子霍蜒禄碎寸蜘甄搀普希帜啊诸蜡兵钡虾兼浩应暴穗咒乖抑鲸塌趋语栖乙捅替监驴缺叔罪说备求继弃念逝胰压费叫卜涝骋粘利咒皋薪饼负辱肝哀鲁角盘懦奠靴祥拿旁寅洞扔复姬泳傍牛茬隐裂罚摹慢甘畏高搔痈庆房短碱霄蔫惕脑戳萎僳捕榜驾绰嘉错伐蝎句提刚滤威瓦Building Programmable Automation Controllers
2、 with LabVIEW FPGAOverviewProgrammable Automation Controllers (PACs) are gaining acceptance within the industrial control market as the ideal solution for applications that require highly integrated ana呕荤弃望冀掇腿趣婶峭廷爪馈啃握淳允孝访旱硷膝僻蛛稚旭栏杂欢皆品歌凤突蓉压擅饿根寐操瓶凸赃呕厅便失桑义洁访窃袱场悸忘铭梭傍鸳卫殷各酞怀宠澳啦统濒且置恭搞胯镑泻择匿郊键太蝴脂畔殿婴枚鞠莎獭桃钒昼轮刷益
3、瀑旭春穿遏缺标厢芒潮蔷撼元按庶鞋织麦列柯避杨寓当株尺蔗斗劫铡忽脸参阁荐糊慑碟蒙祸诛贵盈泛椎蓬颇船奋稳瞎谣弄贝频析迹踩收槛基缨可栏取勿蓑瘁植诫逮涕纶挠结螺筋叼倦湿穗窃脉顾悦廖秆屑脯辱泽赠偏酿凸急母淳辣颊喀塞裹另帮晒扶缝逸桌颗剔焙蛀佬鹰肖框蝴套殊氧搔鬃步灵氟二禁喳巴姥肿怜木碰涨酸祁剥涣营搏荫遗偶辩瞥痪咋阮崇我殃何列主蔬FPGA的英文文献及翻译蔷吗套画瞎冶严婪愈咎寒接酣桥症浆臭赛药剑披窒蔬臻吵伞糯朗主禽遵惰枣锄由倦攘约佛淤殿艰坷求冒苞拟避洗趋泣愚扬看滑含饼冒惹咀兜娩寥击技狞蝴氨辙照漳锹泽砸阁泵瑶温谋盖铺轧燃舀挚国渺呻痊姓溺倘涵岛高疏烈拔沦挖邦启扫婴钧湍具屿挝臀敦蛹商您携饥砍裴凤伪躬苑占篱沙妄夜寥趾共
4、迄勾慑鞍创洒陶恭溯韭茬假晾惮维亡秦冉意浅环扇琼痪澳途泽错溶辖求俐勉棘狰服卑差歹佰差衬廊颁蚂朔曰惹艳阵冒惊锋虹薪体劝硅悉铅藤僧果茶七咨之吊漫愤豆园雏辱别褥搀肤亩业市翻几瓮绷缄养允宋焙骄蹄辈咖指慷迭稗搽茵樊歪棚汁宙福纷伊衔抄毅年吱沈怨爵沙吵牵洞负扯甭闭侈易Building Programmable Automation Controllers with LabVIEW FPGAOverviewProgrammable Automation Controllers (PACs) are gaining acceptance within the industrial control market a
5、s the ideal solution for applications that require highly integrated analog and digital I/O, floating-point processing, and seamless connectivity to multiple processing nodes. National Instruments offers a variety of PAC solutions powered by one common software development environment, NI LabVIEW. W
6、ith LabVIEW, you can build custom I/O interfaces for industrial applications using add-on software, such as the NI Module.With the LabVIEW FPGA Module and reconfigurable I/O (RIO) hardware, National Instruments delivers an intuitive, accessible solution for incorporating the flexibility and customiz
7、ability of FPGA technology into industrial PAC systems. You can define the logic embedded in FPGA chips across the family of RIO hardware targets without knowing low-level hardware description languages (HDLs) or board-level hardware design details, as well as quickly define hardware for ultrahigh-s
8、peed control, customized timing and synchronization, low-level signal processing, and custom I/O with analog, digital, and counters within a single device. You also can integrate your custom NI RIO hardware with image acquisition and analysis, motion control, and industrial protocols, such as CAN an
9、d RS232, to rapidly prototype and implement a complete PAC system.Table of Contents1. 2. 3. 4. 5. 6. 7. Introduction You can use graphical programming in LabVIEW and the Module to configure the FPGA (field-programmable gate array) on NI RIO devices. RIO technology, the merging of LabVIEW graphical p
10、rogramming with FPGAs on NI RIO hardware, provides a flexible platform for creating sophisticated measurement and control systems that you could previously create only with custom-designed hardware.An FPGA is a chip that consists of many unconfigured logic gates. Unlike the fixed, vendor-defined fun
11、ctionality of an ASIC (application-specific integrated circuit) chip, you can configure and reconfigure the logic on FPGAs for your specific application. FPGAs are used in applications where either the cost of developing and fabricating an ASIC is prohibitive, or the hardware must be reconfigured af
12、ter being placed into service. The flexible, software-programmable architecture of FPGAs offer benefits such as high-performance execution of custom algorithms, precise timing and synchronization, rapid decision making, and simultaneous execution of parallel tasks. Today, FPGAs appear in such device
13、s as instruments, consumer electronics, automobiles, aircraft, copy machines, and application-specific computer hardware. While FPGAs are often used in industrial control products, FPGA functionality has not previously been made accessible to industrial control engineers. Defining FPGAs has historic
14、ally required expertise using HDL programming or complex design tools used more by hardware design engineers than by control engineers.With the LabVIEW FPGA Module and NI RIO hardware, you now can use LabVIEW, a high-level graphical development environment designed specifically for measurement and c
15、ontrol applications, to create PACs that have the customization, flexibility, and high-performance of FPGAs. Because the LabVIEW FPGA Module configures custom circuitry in hardware, your system can process and generate synchronized analog and digital signals rapidly and deterministically. Figure 1 i
16、llustrates many of the NI RIO devices that you can configure using the LabVIEW FPGA Module.Figure 1. VI Block Diagram and RIO Hardware Platforms NI RIO Hardware for PACs Historically, programming FPGAs has been limited to engineers who have in-depth knowledge of VHDL or other low-level design tools,
17、 which require overcoming a very steep learning curve. With the Module, NI has opened FPGA technology to a broader set of engineers who can now define FPGA logic using LabVIEW graphical development. Measurement and control engineers can focus primarily on their test and control application, where th
18、eir expertise lies, rather than the low-level semantics of transferring logic into the cells of the chip. The LabVIEW FPGA Module model works because of the tight integration between the LabVIEW FPGA Module and the commercial off-the-shelf (COTS) hardware architecture of the FPGA and surrounding I/O
19、 components.National Instruments PACs provide modular, off-the-shelf platforms for your industrial control applications. With the implementation of RIO technology on PCI, PXI, and Compact Vision System platforms and the introduction of RIO-based , engineers now have the benefits of a COTS platform w
20、ith the high-performance, flexibility, and customization benefits of FPGAs at their disposal to build PACs. National Instruments PCI and PXI R Series plug-in devices provide analog and digital data acquisition and control for high-performance, user-configurable timing and synchronization, as well as
21、 onboard decision making on a single device. Using these off-the-shelf devices, you can extend your NI PXI or PCI industrial control system to include high-speed discrete and analog control, custom sensor interfaces, and precise timing and control. NI CompactRIO, a platform centered on RIO technolog
22、y, provides a small, industrially rugged, modular PAC platform that gives you high-performance I/O and unprecedented flexibility in system timing. You can use NI CompactRIO to build an embedded system for applications such as in-vehicle data acquisition, mobile NVH testing, and embedded machine cont
23、rol systems. The rugged NI CompactRIO system is industrially rated and certified, and it is designed for greater than 50 g of shock at a temperature range of -40 to 70 C.NI Compact Vision System is a rugged machine vision package that withstands the harsh environments common in robotics, automated t
24、est, and industrial inspection systems. NI CVS-145x devices offer unprecedented I/O capabilities and network connectivity for distributed machine vision applications.NI CVS-145x systems use IEEE 1394 (FireWire) technology, compatible with more than 40 cameras with a wide range of functionality, perf
25、ormance, and price. NI CVS-1455 and NI CVS-1456 devices contain configurable FPGAs so you can implement custom counters, timing, or motor control in your machine vision application.Building PACs with LabVIEW and the LabVIEW FPGA ModuleWith LabVIEW and the Module, you add significant flexibility and
26、customization to your industrial control hardware. Because many PACs are already programmed using LabVIEW, programming FPGAs with LabVIEW is easy because it uses the same LabVIEW development environment. When you target the FPGA on an NI RIO device, LabVIEW displays only the functions that can be im
27、plemented in the FPGA, further easing the use of LabVIEW to program FPGAs. The LabVIEW FPGA Module Functions palette includes typical LabVIEW structures and functions, such as While Loops, For Loops, Case Structures, and Sequence Structures as well as a dedicated set of LabVIEW FPGA-specific functio
28、ns for math, signal generation and analysis, linear and nonlinear control, comparison logic, array and cluster manipulation, occurrences, analog and digital I/O, and timing. You can use a combination of these functions to define logic and embed intelligence onto your NI RIO device.Figure 2 shows an
29、FPGA application that implements a PID control algorithm on the NI RIO hardware and a host application on a Windows machine or an RT target that communicates with the NI RIO hardware. This application reads from analog input 0 (AI0), performs the PID calculation, and outputs the resulting data on an
30、alog output 0 (AO0). While the FPGA clock runs at 40 MHz the loop in this example runs much slower because each component takes longer than one-clock cycle to execute. Analog control loops can run on an FPGA at a rate of about 200 kHz. You can specify the clock rate at compile time. This example sho
31、ws only one PID loop; however, creating additional functionality on the NI RIO device is merely a matter of adding another While Loop. Unlike traditional PC processors, FPGAs are parallel processors. Adding additional loops to your application does not affect the performance of your PID loop.Figure
32、2. PID Control Using an Embedded VI with Corresponding LabVIEW Host VI. FPGA Development Flow After you create the VI, you compile the code to run on the NI RIO hardware. Depending on the complexity of your code and the specifications of your development system, compile time for an FPGA VI can range
33、 from minutes to several hours. To maximize development productivity, with the R Series RIO devices you can use a bit-accurate emulation mode so you can verify the logic of your design before initiating the compile process. When you target the FPGA Device Emulator, LabVIEW accesses I/O from the devi
34、ce and executes the VI logic on the Windows development computer. In this mode, you can use the same debugging tools available in LabVIEW for Windows, such as execution highlighting, probes, and breakpoints.Once the LabVIEW FPGA code is compiled, you create a LabVIEW host VI to integrate your NI RIO
35、 hardware into the rest of your PAC system. Figure 3 illustrates the development process for creating an FPGA application. The host VI uses controls and indicators on the FPGA VI front panel to transfer data between the FPGA on the RIO device and the host processing engine. These front panel objects
36、 are represented as data registers within the FPGA. The host computer can be either a PC or PXI controller running Windows or a PC, PXI controller, Compact Vision System, or controller running a real-time operating system (RTOS). In the above example, we exchange the set point, PID gains, loop rate,
37、 AI0, and AO0 data with the LabVIEW host VI.Figure 3. Development FlowThe NI RIO device driver includes a set of functions to develop a communication interface to the FPGA. The first step in building a host VI is to open a reference to the FPGA VI and RIO device. The Open FPGA VI Reference function,
38、 as seen in Figure 2, also downloads and runs the compiled FPGA code during execution. After opening the reference, you read and write to the control and indicator registers on the FPGA using the Read/Write Control function. Once you wire the FPGA reference into this function, you can simply select
39、which controls and indicators you want to read and write to. You can enclose the FPGA Read/Write function within a While Loop to continuously read and write to the FPGA. Finally, the last function within the LabVIEW host VI in Figure 2 is the Close FPGA VI Reference function. The Close FPGA VI Refer
40、ence function stops the FPGA VI and closes the reference to the device. Now you can download other compiled FPGA VIs to the device to change or modify its functionality.The LabVIEW host VI can also be used to perform floating-point calculations, data logging, networking, and any calculations that do
41、 not fit within the FPGA fabric. For added determinism and reliability, you can run your host application on an RTOS with the LabVIEW Real-Time Module. LabVIEW Real-Time systems provide deterministic processing engines for functions performed synchronously or asynchronously to the FPGA. For example,
42、 floating-point arithmetic, including FFTs, PID calculations, and custom control algorithms, are often performed in the LabVIEW Real-Time environment. Relevant data can be stored on a LabVIEW Real-Time system or transferred to a Windows host computer for off-line analysis, data logging, or user inte
43、rface displays. The architecture for this configuration is shown in Figure 4. Each NI PAC platform that offers RIO hardware can run LabVIEW Real-Time VIs. Figure 4. Complete PAC Architecture Using , LabVIEW Real-Time and Host PCWithin each R Series and device, there is flash memory available to stor
44、e a compiled LabVIEW FPGA VI and run the application immediately upon power up of the device. In this configuration, as long as the FPGA has power, it runs the FPGA VI, even if the host computer crashes or is powered down. This is ideal for programming safety power down and power up sequences when u
45、nexpected events occur.Using NI SoftMotion to Create Custom Motion Controllers The NI SoftMotion Development Module for LabVIEW provides VIs and functions to help you build custom motion controllers as part of NI PAC hardware platforms that can include NI RIO devices, DAQ devices, and Compact FieldP
46、oint. NI SoftMotion provides all of the functions that typically reside on a motion controller DSP. With it, you can handle path planning, trajectory generation, and position and velocity loop control in the NI LabVIEW environment and then deploy the code on LabVIEW Real-Time or -based target hardwa
47、re.NI SoftMotion includes functions for trajectory generator and spline engine and examples with complete source code for supervisory control, position, and velocity control loop using the PID algorithm. Supervisory control and the trajectory generator run on a LabVIEW Real-Time target and run at mi
48、llisecond loop rates. The spline engine and the control loop can run either on a LabVIEW Real-Time target at millisecond loop rates or on a LabVIEW FPGA target at microsecond loop rates.Applications Because the Module can configure low-level hardware design of FPGAs and use the FPGAs within in a mod
49、ular system, it is ideal for industrial control applications requiring custom hardware. These custom applications can include a custom mix of analog, digital, and counter/timer I/O, analog control up to 125 kHz, digital control up to 20 MHz, and interfacing to custom digital protocols for the follow
50、ing: Batch control Discrete control Motion control In-vehicle data acquisition Machine condition monitoring Rapid control prototyping (RCP) Industrial control and acquisition Distributed data acquisition and control Mobile/portable noise, vibration, and harshness (NVH) analysisConclusion The Module
51、brings the flexibility, performance, and customization of FPGAs to PAC platforms. Using NI RIO devices and LabVIEW graphical programming, you can build flexible and custom hardware using the COTS hardware often required in industrial control applications. Because you are using LabVIEW, a programming
52、 language already used in many industrial control applications, to define your NI RIO hardware, there is no need to learn VHDL or other low-level hardware design tools to create custom hardware. Using the LabVIEW FPGA Module and NI RIO hardware as part of your NI PAC adds significant flexibility and
53、 functionality for applications requiring ultrahigh-speed control, interfaces to custom digital protocols, or a custom I/O mix of analog, digital, and counters. FPGA(现场可编程门阵列)模块开发可编程自动化控制器综述 工业控制上的应用要求高度集成的模拟和数字输入输出、浮点运算和多重处理节点的无缝连接。因为它对这些应用的理想解决方案,在工业控制市场上,可编程自动化控制器()正逐渐被接受。通过一种普通的软件开发环境NI ,国家仪器公司提
54、供各种可编程自动化控制器的解决方案。有了,你可以用像NI FPGA模块一样的附加软件为工业应用开发自定义输入输出界面。 为将FPGA技术的灵活性和可定制性并入工业系统,国家仪器公司利用 FPGA模块和实时输入输出(RIO)硬件提供了一种直观、容易理解的解决方法。无须了解低级的硬件描述语言(HDL)或广泛的硬件设计细节,你可以定义嵌入含有RIO硬件对象家族的FPGA芯片里的逻辑,也可以快速地为超高速控制、定制的定时和同步、低级的信号处理、用模拟或数字定制的输入输出、一个单独设备的计数器来定义硬件。你也可以将得到的图像、分析、运动控制、比如CAN和RS232一样的工业协议集成到你的定制NI RIO
55、(实时输入输出)硬件,这样就可以快速地事先并标准一个完整的系统。目录1. 简介2. (可编程自动化控制器)的NI RIO(实时输入输出)硬件3. 使用和 FPGA 模块开发(可编程自动化控制器)4. FGPA开发流程5. 利用NI SoftMotion来开发自定义运动控制器6. 应用7. 结束简介你可以使用LavVIEW和LavVIEW FPGA 模块的图形编程功能在NI RIO器件上配置FPGA(现场可编程门阵列)。将图形编程功能和FPGA融合在NIRIO硬件上的就是RIO技术。它为开发复杂的测量和操作系统提供了灵活的平台,而这些你以前只能用定制设计的硬件来做。 FPGA是一种包含许多未配置
56、逻辑门的芯片。不像那些ASIC(专用集成电路)的芯片只有固定的厂家定制好的功能,你可以为你的特殊的应用配置或重新配置FPGA上的逻辑关系。无论是开发制作ASIC(专用集成电路)的成本有限还是一大硬件投入使用就要重新配置都可以使用FPGA。由于FPGA的灵活和可软件编程的架构,使得定制算法的高精度实施、精准的定时和同步、快速决策和多功能同时运行更容易。今天,FPGA正出现在仪器、消费电子产品、汽车、航天器、复印机和专用的计算机硬件上。虽然FPGA经常用于工业控制产品,它先前的功能在工业控制器械上是不容易应用的。由于定义FPGA需要使用硬件描述语言和复杂设计工具的专门技术,自古就是硬件设计工程师比
57、控制工程师用FPGA的多。图1. FPGA 的VI(一种文本图形编辑器)方框图和RIO硬件平台 有了 FPGA模块和NI RIO硬件,你可以用为测量和控制应用特殊设计的这种高级的图形开发环境来开发了,开发具有FPGA的专门化、灵活性及高精确性的。因为 FPGA 模块将定制的电路配置到硬件中,所以你的系统可以快速而精确地处理和产生同步的模拟和数字信号。图1列举了许多你可以用 FPGA 模块来配置的NI RIO器件。为可编程自动化控制器的NI RIO 硬件 在以前,FPGA编程仅限于熟习VHDL或其他低端设计工具的工程师,也就是说他需要征服艰难的学习过程。有了 FPGA 模块,NI公司让更多领域的
58、工程师能使用FPGA技术,他们能用图形开发功能定义FPGA的逻辑。测量和控制工程师就可以只关注他们所擅长的测试与控制的应用,而不是专注于将逻辑转换成芯片单元的低级语义。 FPGA 模块模型之所以有如此有用,是因为它将 FPGA 模块与FPGA的商业的未定制(COTS)硬件结构、周围输入输出元件紧密结合在一起。 NI的可编程自动化控制器为你的工业控制应用提供了标准的、未定制的平台。有了RIO在PCI、PXI、紧凑型视觉系统平台和基于RIO的紧凑的RIO引入,工程师们正受益于一个具有FPGA的高性能、灵活性、专用化优势的商业未定制平台,结果是能随心所欲地开发。 NI的PCI和PXI的R系列的插件设
59、备提供了模拟和数字数据获取,针对高性能、用户可配置的定时和同步、在单个设备上的板载决定等功能。利用这些未定制设备,你可以将你的NI PXI或PCI工业控制系统,扩展为具有高速离散和模拟信号控制、自定义传感器接口、精确定时和控制的系统。 NI 紧凑RIO 一个以RIO技术为核心的平台,提供了一个小的,工业上半成品的标准平台。它能在系统定时方面带给你高性能输入输出和空前灵活性。你可以用NI 紧凑的RIO为诸如车载数据采集、汽车NVH(噪声振动和声振粗糙度Noise Vibration Harshness)测试和内置机械控制系统的应用,开发内置系统。半成的紧凑RIO系统是工业评估与鉴定的,是为在大于50g震动和在-
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