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1、Computer Operating SystemsFANG Dingyi(房鼎益房鼎益)Department of Networking & Communication Eng.TEL: 88308273(lab); 88308114(O)Email: Words before the Course:Textbook: Operating SystemsInternals and Design Principles(3ird or 4th edition),William Stalling, Prentice Hall/清华大学出版社清华大学出版社;魏迎梅等译,电子工业出版社出版魏迎梅等译,
2、电子工业出版社出版Words before the Course:Grade: 30%(10%presentation+10%homewwork+10%project) + 30%(mid term exam) +40%(final exam)Claim of the exam: all question are in EnglishWords before the Course:Reference boobs (in Chinese):1.计算机操作系统计算机操作系统, 骆斌等著,高等教育出版社;骆斌等著,高等教育出版社;2.计算机操作系统计算机操作系统, 孙雅如、房鼎益著,西电出版社;孙雅
3、如、房鼎益著,西电出版社; 3.计算机操作系统计算机操作系统, 汤子赢等著,西电出版社;汤子赢等著,西电出版社;4.计算机操作系统计算机操作系统, 何炎祥等著,清华大学出版社;何炎祥等著,清华大学出版社;Computer System OverviewChapter 1网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Operating System Exploits the hardware resources of one or more processors(充分利用处理机资源充分利用处理机资源) Provides
4、 a set of services to system users (提供方便用户使用的服务提供方便用户使用的服务) Manages secondary memory and I/O devices (管理外存与外设管理外存与外设)网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Basic Elements Processor Main Memory referred to as real memory or primary memory Volatile (易挥发的易挥发的掉电后内容丢失掉电后内容丢失) I/O m
5、odules secondary memory devices communications equipment terminals System bus communication among processors, memory, and I/O modules网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Top-Level Components网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Processor Registers Use
6、r-visible registers Enable programmer to minimize main-memory references by optimizing register use Control and status registers Used by processor to control operating of the processor Used by operating-system routines to control the execution of programs网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 202
7、1-10-222021-10-22User-Visible Registers May be referenced by machine language Available to all programs - application programs and system programs Types of registers Data Address Index Segment pointer Stack pointer网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22User-Visible Registers A
8、ddress Registers Index involves adding an index to a base value to get an address Segment pointer when memory is divided into segments, memory is referenced by a segment and an offset Stack pointer points to top of stack网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Control and Status
9、 Registers Program Counter (PC) Contains the address of an instruction to be fetched Instruction Register (IR) Contains the instruction most recently fetched Program Status Word (PSW) condition codes Interrupt enable/disable Supervisor/user mode网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-22202
10、1-10-22Control and Status Registers Condition Codes or Flags Bits set by the processor hardware as a result of operations Can be accessed by a program but not altered Examples positive result negative result zero Overflow网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Instruction Execu
11、tion Two steps Processor reads instructions from memory Fetches Processor executes each instruction网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Instruction Cycle网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Instruction Fetch and Execute The processor fetches the inst
12、ruction from memory Program counter (PC) holds address of the instruction to be fetched next Program counter is incremented after each fetch网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Instruction Register Fetched instruction is placed in the instruction register Types of instructio
13、ns Processor-memory transfer data between processor and memory Processor-I/O data transferred to or from a peripheral device Data processing arithmetic or logic operation on data Control alter sequence of execution网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Characteristics of a Hyp
14、othetical Machine网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Example of Program Execution网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Direct Memory Access (DMA) I/O exchanges occur directly with memory Processor grants I/O module authority to read from or write to
15、memory Relieves the processor responsibility for the exchange Processor is free to do other things网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Interrupts An interruption of the normal sequence of execution Improves processing efficiency Allows the processor to execute other instruct
16、ions while an I/O operation is in progress A suspension of a process caused by an event external to that process and performed in such a way that the process can be resumed网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Classes of Interrupts网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 202
17、1-10-222021-10-22Program Flow of Control Without Interrupts网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Program Flow of Control With Interrupts, Short I/O Wait网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Program Flow of Control With Interrupts; Long I/O Wait网络与分布式系统
18、研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Interrupt Handler A program that determines nature of the interrupt and performs whatever actions are needed Control is transferred to this program Generally part of the operating system网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-
19、22Interrupts Suspends the normal sequence of execution网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Interrupt Cycle网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Interrupt Cycle Processor checks for interrupts If no interrupts fetch the next instruction for the current
20、 program If an interrupt is pending (待解决的待解决的), suspend execution of the current program, and execute the interrupt-handler routine网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Timing Diagram Based on Short I/O Wait网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Timing
21、Diagram Based on Short I/O Wait网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Simple Interrupt Processing网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Changes in Memory and Registers for an Interrupt网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Changes
22、in Memory and Registers for an Interrupt网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Multiple Interrupts Disable interrupts while an interrupt is being processed网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Multiple Interrupts Define priorities for interrupts网络与分布式系统
23、研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Multiple Interrupts网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Multiprogramming Processor has more than one program to execute The sequence the programs are executed depend on their relative priority and whether they are waiting
24、 for I/O After an interrupt handler completes, control may not return to the program that was executing at the time of the interrupt网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Memory Hierarchy Faster access time, greater cost per bit Greater capacity, smaller cost per bit Greater c
25、apacity, slower access speed网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Memory Hierarchy网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Going Down the Hierarchy Decreasing cost per bit Increasing capacity Increasing access time Decreasing frequency of access of the me
26、mory by the processor Locality of reference网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Secondary Memory Nonvolatile Auxiliary memory Used to store program and data files网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Disk Cache A portion of main memory used as a buffe
27、r to temporarily to hold data for the disk Disk writes are clustered Some data written out may be referenced again. The data are retrieved rapidly from the software cache instead of slowly from disk网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Cache Memory Invisible to operating syst
28、em Increase the speed of memory Processor speed is faster than memory speed Exploit the principle of locality网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Cache Memory网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Cache Memory Contains a copy of a portion of main memor
29、y Processor first checks cache If not found in cache, the block of memory containing the needed information is moved to the cache and delivered to the processor网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Cache/Main Memory System网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-2220
30、21-10-22Cache Read Operation网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Cache Design Cache size Small caches have a significant impact on performance Block size The unit of data exchanged between cache and main memory Larger block size more hits until probability of using newly fet
31、ched data becomes less than the probability of reusing data that have to be moved out of cache网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-222021-10-22Cache Design Mapping function Determines which cache location the block will occupy Replacement algorithm Determines which block to replace Least-Recently-Used (LRU) algorithm网络与分布式系统研究室网络与分布式系统研究室(DisNet Lab of NWU) 2021-10-22202
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