基于Spartan-6的FPGA SP601开发设计方案_第1页
基于Spartan-6的FPGA SP601开发设计方案_第2页
基于Spartan-6的FPGA SP601开发设计方案_第3页
基于Spartan-6的FPGA SP601开发设计方案_第4页
基于Spartan-6的FPGA SP601开发设计方案_第5页
已阅读5页,还剩12页未读 继续免费阅读

付费下载

下载本文档

版权说明:本文档由用户提供并上传,收益归属内容提供方,若内容存在侵权,请进行举报或认领

文档简介

基于Spartan-6的FPGASP601开发设计方案基于Spartan-6的FPGASP601开发设计方案Spartan-6是Xilinx公司的FPGA批量应用有最低成本的FPGA,采用45nm低功耗铜工艺,在成本,性能和功耗上有最好的平衡.该系列共有13个产品,逻辑单元从3,840到147,443,有广泛的用途.本文介绍了Spartan-6FPGA主要特性,以及在汽娱乐系统应用框图,平板显示器应用框图和视频监视系统应用框图,SP601开发套件主要特性和详细电路图.

TheSpartan®-6familyprovidesleadingsystemintegrationcapabilitieswiththelowesttotalcostforhigh-volumeapplications.Thethirteen-memberfamilydeliversexpandeddensitiesrangingfrom3,840to147,443logiccells,withhalfthepowerconsumptionofpreviousSpartanfamilies,andfaster,morecomprehensiveconnectivity.Builtonamature45nmlow-powercopperprocesstechnologythatdeliverstheoptimalbalanceofcost,power,andperformance,theSpartan-6familyoffersanew,moreefficient,dual-register6-inputlookuptable(LUT)logicandarichselectionofbuilt-insystem-levelblocks.Theseinclude18Kb(2x9Kb)blockRAMs,secondgenerationDSP48A1slices,SDRAMmemorycontrollers,enhancedmixed-modeclockmanagementblocks,SelectIO™technology,poweroptimizedhigh-speedserialtransceiverblocks,PCIExpress®compatibleEndpointblocks,advancedsystem-levelpowermanagementmodes,auto-detectconfigurationoptions,andenhancedIPsecuritywithAESandDeviceDNAprotection.ThesefeaturesprovidealowcostprogrammablealternativetocustomASICproductswithunprecedentedeaseofuse.Spartan-6FPGAsofferthebestsolutionfor

high-volumelogicdesigns,consumer-orientedDSPdesigns,andcost-sensitiveembeddedapplications.Spartan-6FPGAsaretheprogrammablesiliconfoundationforTargetedDesignPlatformsthatdeliverintegratedsoftwareandhardwarecomponentsthatenabledesignerstofocusoninnovationassoonastheirdevelopmentcyclebegins.

Spartan-6FPGA主要特性:

•Spartan-6Family:

•Spartan-6LXFPGA:Logicoptimized

•Spartan-6LXTFPGA:High-speedserialconnectivity

•Designedforlowcost

•Multipleefficientintegratedblocks

•OptimizedselectionofI/Ostandards

•Staggeredpads

•High-volumeplasticwire-bondedpackages

•Lowstaticanddynamicpower

•45nmprocessoptimizedforcostandlowpower

•Hibernatepower-downmodeforzeropower

•Suspendmodemaintainsstateandconfigurationwithmulti-pinwake-up,controlenhancement

•Lower-power1.0Vcorevoltage(LXFPGAs,-1Lonly)

•Highperformance1.2Vcorevoltage(LXandLXTFPGAs,-2,-3,and-4speedgrades)

•Multi-voltage,multi-standardSelectIO™interfacebanks

•Upto1,050Mb/sdatatransferrateperdifferentialI/O

•Selectableoutputdrive,upto24mAperpin

•3.3Vto1.2VI/Ostandardsandprotocols

•Low-costHSTLandSSTLmemoryinterfaces

•Hotswapcompliance

•AdjustableI/Oslewratestoimprovesignalintegrity

•High-speedGTPserialtransceiversintheLXTFPGAs

•Upto3.125Gb/s

•High-speedinterfacesincluding:SerialATA,Aurora,1GEthernet,PCIExpress,OBSAI,CPRI,EPON,GPON,DisplayPort,andXAUI

•IntegratedEndpointblockforPCIExpressdesigns(LXT)

•Low-costPCI®technologysupportcompatiblewiththe33MHz,32-and64-bitspecification.

•EfficientDSP48A1slices

•High-performancearithmeticandsignalprocessing

•Fast18x18multiplierand48-bitaccumulator

•Pipeliningandcascadingcapability

•Pre-addertoassistfilterapplications

•IntegratedMemoryControllerblocks

•DDR,DDR2,DDR3,andLPDDRsupport

•Dataratesupto800Mb/s(12.8Gb/speakbandwidth)

•Multi-portbusstructurewithindependentFIFOtoreducedesigntimingissues

•Abundantlogicresourceswithincreasedlogiccapacity

•OptionalshiftregisterordistributedRAMsupport

•Efficient6-inputLUTsimproveperformanceandminimizepower

•LUTwithdualflip-flopsforpipelinecentricapplications

•BlockRAMwithawiderangeofgranularity

•FastblockRAMwithbytewriteenable

•18Kbblocksthatcanbeoptionallyprogrammedastwoindependent9KbblockRAMs

•ClockManagementTile(CMT)forenhancedperformance

•Lownoise,flexibleclocking

•DigitalClockManagers(DCMs)eliminateclockskewanddutycycledistortion

•Phase-LockedLoops(PLLs)forlow-jitterclocking

•Frequencysynthesiswithsimultaneousmultiplication,division,andphaseshifting

•Sixteenlow-skewglobalclocknetworks

•Simplifiedconfiguration,supportslow-coststandards

•2-pinauto-detectconfiguration

•Broadthird-partySPI(uptox4)andNORflashsupport

•FeaturerichXilinxPlatformFlashwithJTAG

•MultiBootsupportforremoteupgradewithmultiplebitstreams,usingwatchdogprotection

•Enhancedsecurityfordesignprotection

•UniqueDeviceDNAidentifierfordesignauthentication

•AESbitstreamencryptioninthelargerdevices

•Fasterembeddedprocessingwithenhanced,lowcost,MicroBlaze™softprocessor

•Industry-leadingIPandreferencedesigns

Spartan-6FPGA器件列表:

Spartan-6FPGAsstorethecustomizedconfigurationdatainSRAM-typeinternallatches.Thenumberofconfigurationbitsisbetween2.6Mband33Mbdependingondevicesizebutindependentofthespecificuser-designimplementation,unlesscompressionmodeisused.TheconfigurationstorageisvolatileandmustbereloadedwhenevertheFPGAispoweredup.

ThisstoragecanalsobereloadedatanytimebypullingthePROGRAM_BpinLow.Severalmethodsanddataformatsforloadingconfigurationareavailable.

Bit-serialconfigurationscanbeeithermasterserialmode,wheretheFPGAgeneratestheconfigurationclock(CCLK)signal,orslaveserialmode,wheretheexternalconfigurationdatasourcealsoclockstheFPGA.Forbyte-wideconfigurations,masterSelectMAPmodegeneratestheCCLKsignalwhileslaveSelectMAPmodereceivestheCCLKsignalforthe8-and16-bit-widetransfer.Inmasterserialmode,thebeginningofthebitstreamcanoptionallyswitchtheclockingsourcetoanexternalclock,whichcanbefasterormoreprecisethantheinternalclock.TheavailableJTAGpinsuseboundary-scanprotocolstoloadbit-serialconfigurationdata.

图1.Spartan-6FPGA在汽娱乐系统应用框图

Servingasacompaniontothehostprocessor,asingleSpartan-6LX45TFPGAsupportsaudio/videoacceleration,graphicssubsystem,andvehiclenetworkingfunctions.

图2.Spartan-6FPGA在平板显示器应用框图

High-ResolutionVideoFlat-PanelDisplaywithDynamicBacklightControl

AchievehigherimagequalitywhilereducingpowerandcostusingSpartan-6FPGAswithintegratedserialI/Ocapabilities.

图3.Spartan-6FPGA在视频监视系统应用框图

SurveillanceImageCaptureandAnalyticsEngine

Integratesensorinterfacing,videoanalytics,imageenhancementandnetworkinterfacinginasingleSpartan-6LX150TFPGA.

TheSpartan®-6familyprovidesleadingsystemintegrationcapabilitieswiththelowesttotalcostforhigh-volumeapplications.Thethirteen-memberfamilydeliversexpandeddensitiesrangingfrom3,400to148,000logiccells,withhalfthepowerconsumptionofpreviousSpartanfamiliesandfaster,morecomprehensiveconnectivity.

Builtonamature45nmlow-powercopperprocesstechnologythatdeliverstheoptimalbalanceofcost,power,andperformance,theSpartan®-6familyoffersanew,moreefficient,dual-register6-inputlook-uptable(LUT)logicandarichselectionofbuilt-insystem-levelblocks.Theseinclude18KbblockRAMs,secondgenerationDSP48A1slices,SDRAMmemorycontrollers,enhancedmixed-modeclockmanagementblocks,SelectIO™technology,power-optimizedhigh-speedserialtransceiverblocks,PCIExpress™compatibleEndpointblocks,advancedsystem-levelpowermanagementmodes,autodetectconfigurationoptions,andenhancedIPsecuritywithAESandDeviceDNAprotection.Thesefeaturesprovidealow-costprogrammablealternativetocustomASICproductswithunprecedentedease-of-use.Spartan®-6FPGAsaretheprogrammablesiliconfoundationforTargetedDesignPlatformsthatdeliverintegratedsoftwareandhardwarecomponentstoenabledesignerstofocusoninnovationassoonastheirdevelopmentcyclebegins.

SP601评估套件

TheSP601EvaluationKitisbasedontheXC6SLX16-2CSG324Spartan-6FPGA.ThisFPGAcontains14,579logiccells,aratingthatreflectstheincr

温馨提示

  • 1. 本站所有资源如无特殊说明,都需要本地电脑安装OFFICE2007和PDF阅读器。图纸软件为CAD,CAXA,PROE,UG,SolidWorks等.压缩文件请下载最新的WinRAR软件解压。
  • 2. 本站的文档不包含任何第三方提供的附件图纸等,如果需要附件,请联系上传者。文件的所有权益归上传用户所有。
  • 3. 本站RAR压缩包中若带图纸,网页内容里面会有图纸预览,若没有图纸预览就没有图纸。
  • 4. 未经权益所有人同意不得将文件中的内容挪作商业或盈利用途。
  • 5. 人人文库网仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对用户上传分享的文档内容本身不做任何修改或编辑,并不能对任何下载内容负责。
  • 6. 下载文件中如有侵权或不适当内容,请与我们联系,我们立即纠正。
  • 7. 本站不保证下载资源的准确性、安全性和完整性, 同时也不承担用户因使用这些下载资源对自己和他人造成任何形式的伤害或损失。

评论

0/150

提交评论