eda课程设计自动售货机的设计说明

./电子信息科学与技术专业课程设计任务书学生专业班级学号题目自动售货机的设计课题性质工程设计课题来源自拟课题指导教师同组主要容设计制作一个自动售货机,该自动售货机能完成货物信息存储、进程控制、硬币处理、余额计算、显示等功能。自动售货机可以售2种货物,每种货物的数量和单价在初始化时设入,在存储器中存储。用户可以用硬币进行购物,按键进行选择。系统根据用户输入的货币,判断钱币是否够,钱币足够则根据顾客要求自动售货；钱币不够则给出提示并退出。系统自动地计算出应找钱币余额、库存数量并显示。〔提示：钱数以5角为单位。任务要求①根据设计题目要求编写相应程序代码②对编写的VHDL程序代码进行编译和仿真③总结设计容,完成课程设计说明书参考文献[1]焦素敏.EDA课程设计指导书.：工业大学,2008[2]松,黄继业.EDA技术实用教程.：科学,2002[3]王国栋,松等.VHDL实用教程.：电子科技大学,2000[4]亦华,延明.数字电路EDA入门.：电子工业,2003[5].ele-diy./中国电子制作网审查意见指导教师签字教研室主任签字20XX2月20日一．设计说明根据要求可自动出售两种货物,本文设计的自动售货机可销售cola和pepsi两种饮料：售货机可识别1元和0.5元的两种货币,在一次购买过程中,可购买一个或多个商品,系统会自动计算所需钱数和找零的钱数并自动找零。另外有3个发光二极管、6个LCD数码管：两个用来显示所需金额,两个用来显示已付金额,两个用来显示找零数。1.1.1流程说明本文设计的自动售货机当通电时,表示一次销售的开始。顾客选择一种商品或多种商品后就进入投币状态。若不投币,则自动返回初始状态。投币后,系统自动计算所投钱数。若投币够,则出货并找零。若投币不够,如果顾客没有继续投币,则退币并回到初始状态。本系统的投币销售流程图如图所示：退币清零退币清零结束出货找零继续投币综合〉物价计算金额投币选择开始1.1.2各模块说明 本文设计的自动售货机总体分三个模块：总控模块,二进制译码模块、BCD码译码模块。总控模块：总控模块是本系统最重要的模块,该模块大体有5个输入端口和6个输出端口。其输入端口包括clk、coin1〔投入一元货币、coin5〔投入0.5元货币、cola〔选择cola、pepsi<选择pepsi>,输出端口有paid〔已投入多少钱、needed〔还需多少钱moneyout〔找零、success〔灯亮表示交易成功、failure〔灯亮表示交易失败、showmoneyout〔灯亮表示正在找零。该模块实现了本系统最重要的交易过程,包括选择商品、投入货币,计算剩余金额,找零出货等。二进制译码模块：该模块有一个输入端口和两个输出端口。输入端口是一个8位的二进制数输出端口bcd0、bcd1是两个4位的BCD码。该模块的主要的功能是实现将主控模块输出的二进制数〔paid、needed、moneyout转换成BCD码,以便输出到七段数码管上显示出来。该模块的原理是将一个8位的二进制转换成2个4位的BCD码,分为高四位和低四位。BCD码译码模块：该模块有一个输入端口和一个输出端口1.1.3程序设计主控模块完整程序如下：Libraryieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all;entityshouhuojiisport<clk:instd_logic;coin1:instd_logic;coin5:instd_logic;cola:instd_logic;pepsi:instd_logic;paid:outstd_logic_vector<7downto0>;needed:outstd_logic_vector<7downto0>;success:outstd_logic;failure:outstd_logic;showmoneyout:outstd_logic;moneyout:outstd_logic_vector<7downto0>>;endshouhuoji;architecturebehavofshouhuojiistypestate_typeis<qa,qb,qe,qc,qg,qd,qf>;--定义七个状态signalcurrent_state:state_type:=qa;signalq:integerrange0to100;beginprocess<clk>variablepaidtemp:std_logic_vector<7downto0>;--定义变量variableneededtemp:std_logic_vector<7downto0>;variablebackmoney:std_logic_vector<7downto0>;variablepricetemp:std_logic_vector<7downto0>;beginifclk'eventandclk='1'thencasecurrent_stateiswhenqa=>paidtemp:="00000000";neededtemp:="00000000";backmoney:="00000000";pricetemp:="00000000";q<=0;showmoneyout<='0';moneyout<="00000000";paid<="00000000";needed<="00000000";failure<='0';success<='0';ifcola='1'orpepsi='1'thencurrent_state<=qb;ifcola='1'thenpricetemp:=pricetemp+"00001111";neededtemp:=pricetemp;Elsepricetemp:=pricetemp+"00010100";neededtemp:=pricetemp;endif;endif;paid<=paidtemp;needed<=neededtemp;whenqb=>ifcoin1='1'orcoin5='1'thenifcoin1='1'thenpaidtemp:=paidtemp+"00001010";elsepaidtemp:=paidtemp+"00000101";endif;ifpaidtemp>=pricetempthenbackmoney:=paidtemp-pricetemp;neededtemp:="00000000";current_state<=qd;elseneededtemp:=pricetemp-paidtemp;backmoney:="00000000";current_state<=qc;q<=0;endif;paid<=paidtemp;needed<=neededtemp;endif;ifq<8thenq<=q+1;ifcola='1'orpepsi='1'thenq<=0;ifcola='1'thenpricetemp:=pricetemp+"00001111";neededtemp:=neededtemp+"00001111";elsepricetemp:=pricetemp+"00010100";neededtemp:=neededtemp+"00010100";endif;paid<=paidtemp;needed<=neededtemp;endif;elsecurrent_state<=qe;q<=0;endif;whenqe=>failure<='1';ifq<4thenq<=q+1;elsecurrent_state<=qa;q<=0;endif;whenqc=>ifcoin1='1'orcoin5='1'thenifcoin1='1'thenpaidtemp:=paidtemp+"00001010";elsepaidtemp:=paidtemp+"00000101";endif;ifpaidtemp>=pricetempthenbackmoney:=paidtemp-pricetemp;neededtemp:="00000000";current_state<=qd;elseneededtemp:=pricetemp-paidtemp;backmoney:="00000000";current_state<=qc;endif;paid<=paidtemp;needed<=neededtemp;endif;ifcoin1/='1'andcoin5/='1'thenifq<10thenq<=q+1;elsecurrent_state<=qg;endif;elseq<=0;endif;whenqg=>failure<='1';showmoneyout<='1';moneyout<=paidtemp;current_state<=qf;q<=0;success<='0';whenqd=>success<='1';ifbackmoney>"00000000"thenshowmoneyout<='1';moneyout<=backmoney;endif;current_state<=qf;q<=0;whenqf=>ifq<4thenq<=q+1;elsecurrent_state<=qa;q<=0;endif;endcase;elseendif;endprocess;endbehav;BCD译码模块完整程序如下：Libraryieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all;entitycode1isport<b:instd_logic_vector<7downto0>;bcd0:outstd_logic_vector<3downto0>;bcd1:outstd_logic_vector<3downto0>>;endcode1;architectureoneofcode1isbeginprocess<b>begincasebiswhen"00000000"=>bcd0<="0000";bcd1<="0000";--译码"0"；when"00000001"=>bcd0<="0001";bcd1<="0000";--译码"1"；when"00000010"=>bcd0<="0010";bcd1<="0000";--译码"2"；when"00000011"=>bcd0<="0011";bcd1<="0000";--译码"3"；when"00000100"=>bcd0<="0100";bcd1<="0000";--译码"4"；when"00000101"=>bcd0<="0101";bcd1<="0000";--译码"5"；when"00000110"=>bcd0<="0110";bcd1<="0000";when"00000111"=>bcd0<="0111";bcd1<="0000";when"00001000"=>bcd0<="1000";bcd1<="0000";when"00001001"=>bcd0<="1001";bcd1<="0000";when"00001010"=>bcd0<="0000";bcd1<="0001";when"00001011"=>bcd0<="0001";bcd1<="0001";when"00001100"=>bcd0<="0010";bcd1<="0001";when"00001101"=>bcd0<="0011";bcd1<="0001";when"00001110"=>bcd0<="0100";bcd1<="0001";when"00001111"=>bcd0<="0101";bcd1<="0001";when"00010000"=>bcd0<="0110";bcd1<="0001";when"00010001"=>bcd0<="0111";bcd1<="0001";when"00010010"=>bcd0<="1000";bcd1<="0001";when"00010011"=>bcd0<="1001";bcd1<="0001";when"00010100"=>bcd0<="0000";bcd1<="0010";译码"20"whenothers=>null;endcase;endprocess;endone;顶层模块完整程序如下：libraryIEEE;useIEEE.STD_LOGIC_1164.ALL;useIEEE.STD_LOGIC_ARITH.ALL;useIEEE.STD_LOGIC_UNSIGNED.ALL;entitytopisPort<clk1:instd_logic;C1,C5,P1_5,P2:instd_logic;paid_lcd0,paid_lcd1,needed_lcd0,needed_lcd1,Mout_lcd0,Mout_lcd1:outstd_logic_vector<3downto0>;s,f,showout:outstd_logic>;endtop;architectureoneoftopiscomponentshouhuojiport<clk:instd_logic;coin1:instd_logic;coin5:instd_logic;cola:instd_logic;pepsi:instd_logic;paid:outstd_logic_vector<7downto0>;needed:outstd_logic_vector<7downto0>;success:outstd_logic;failure:outstd_logic;showmoneyout:outstd_logic;moneyout:outstd_logic_vector<7downto0>>;endcomponent;componentcode1port<b:instd_logic_vector<7downto0>;bcd0:outstd_logic_vector<3downto0>;bcd1:outstd_logic_vector<3downto0>>;endcomponent;signalp,n,mo:std_logic_vector<7downto0>;--signals1,s2,s3,s4,s5,s6:std_logic_vector<3downto0>;beginu0:shouhuoji--各模块连接portmap<clk=>clk1,coin1=>C1,coin5=>C5,cola=>P1_5,pepsi=>P2,success=>s,failure=>f,showmoneyout=>showout,paid=>p,needed=>n,moneyout=>mo>;u1:code1portmap<b=>p,bcd0=>paid_lcd0,bcd1=>paid_lcd1>;u2:code1portmap<b=>n,bcd0=>needed_lcd0,bcd1=>needed_lcd1>;u3:code1portmap<b=>mo,bcd0=>Mout_lcd0,bcd1=>Mout_lcd1>;endone;1.1.4各模块的连接 各模块的连接如图所示：售货机主控系统和译码器模块图售货机顶层模块2、1主控模块的仿真上图表示顾客选择了pepsi饮料后,且投了2个一元的硬币。Success为高电平,代表售货机有饮料售出。且余额为0.上图表示顾客选择了pepsi饮料后,且投1个一元的硬币和一个0.5元的硬币。failure为高电平,代表售货机无饮