基于分立器件并联型碳化硅逆变器的叠层母排设计研究

ProceedingsoftheCSEE报©2022Chin.Soc.forElec.Eng.於少林，张兴，王佳宁*，吴馥晨，王琛，刘元剑与自动化工程学院，安徽省合肥市230009)rchontheDesignofLaminatedBusbarBasedonDiscreteDevicesinParalleltotheSiliconCarbideInvertereringandAutomationHefeiUniversityofTechnologyHefeiAnhuiProvinceChinaABSTRACT:Forthesiliconcarbide(SiC)invertersbasedonthesolutionofdiscretedevicesinparallel,thelaminatedbusbarneedstomeetthedesignobjectivesoflowparasiticinductance,externalcircuitsymmetry,anddevicetemperaturebalance.However,mostoftheexistingdesignsolutionsforthebusbarareaimedatthepowermodule,andthereisalackofasystematicdesignapproachforthebusbarwiththediscretedevicesinparallel.Firstly,thethree-dimensionalstructuralcharacteristicofthelaminatedbusbarwaspresentedtakingtheparallelconnectionoftwodevicesasanexample.Then,amodelinganddecouplingmethodfortheparasiticinductancewasproposedtoprovideabasisforevaluatingthevalueandsymmetryoftheparasiticinductance.Finally,byusingtheparametricsimulationofAnsysQ3D,thedifferentdevicelayoutsandkeyphysicaldimensionswereoptimized,andsomedesignprincipleswereconcluded.Basedontheabovemethods,alaminatedbusbarwithsixdevicesinparallelwasdesigned.Thefinalsimulatedandexperimentalresultsverifythatthebusbarmeetstheobjectivesoflowparasiticinductance,symmetryoftheexternalcircuit,anddevicetemperaturebalance.KEYWORDS:siliconcarbide(SiC)inverters;discretedevicesinparallel;thelaminatedbusbar;parasiticinductancesKZS划(BP0719039).ProjectSupportedbyNationalNaturalScienceFoundationofChina(52077051);InstituteofEnergy，HefeiComprehensiveNationalScienceCenter(21KZS203);ProgramofIntroducingTalentsofDisciplinetoUniversities(BP0719039).动汽车逆变器的综合性能[5-7]。可分为功率模块式方案[8-10]和多分立器件并联式方第10期於少林等：基于分立器件并联型碳化硅逆变器的叠层母排设计研究3739UVWD HAC LSUVWD HAC LSSSSSTTUUVWDHnTHn HnDLnTLnLn H1DL1DH1TH1TL1L1AC(a)功率模块(b)基于TO247封装的分立器件扑Fig.1Theinvertertopologybasedonthesolutionsofduleordiscretedevicesinparallel联型方案可通过增减并联器件的数目来改变电流方案，已有大量文献对其叠层母排结构进行了研带来不对称的寄生电感进而使电流在并联器件间案中的叠层母排设计也需要确保所并联的器件能需终提取出的多维电感矩阵包含了各支路的自感和式以及母排结构设计的优劣性。文献[36]建立了叠快速评估母排的电感量。文献[37]在各并联支路中本文针对分立器件并联型叠层母排缺乏系统1.1叠层母排与分立器件连接形式中国电机工程学报第42卷DLSL1TH1TL1TH2TL2散热器Y交流母排iCMOSFETsDLSL1TH1TL1TH2TL2散热器Y交流母排iCMOSFETs极端子与交流端相连，而功率源极端子与负极相臂单管相连以构成完整的桥臂电路。对于功率模排表面开槽，各导电层伸出对应的端子与器件pin交流母排SH1SDH1母排正母排FigTheconnectionofdiscretedevicesandlaminatedbusbar1.2器件在叠层母排中的布局分立器件在空间维度的对称布局有利于实现(a)对称型排列nnn(b)直线型排列FigThelayoutsofdiscretedevicesinparallel缺点在于散热器面积会比较大，不利于紧凑型设TTL1TL2TH1散热器TH2a形式1a形式1FigThelayoutsofdiscretedevicesontheheatsink散热器两侧便于实现各并联支路寄生电感的对称ZX母排正母排驱动板 驱动板散热器FigBasic3Dstructureofthelaminatedbusbar第10期於少林等：基于分立器件并联型碳化硅逆变器的叠层母排设计研究3741C4Mp1p2Ln1n1Ln2n2La1a1Mp1b1ACLa2a2Mp1a1Lp1p1Mp1a2Mp1b2Mp1n2Lp2p2C4Mp1p2Ln1n1Ln2n2La1a1Mp1b1ACLa2a2Mp1a1Lp1p1Mp1a2Mp1b2Mp1n2Lp2p2Lb1b1Lb2b2Mp1n1正母排TH2交流母排母排32TL1TL2C2分立器件并联型叠层母排寄生电感建模有效方法对不同布局方式和结构下叠层母排寄生2.1并联支路电流路径分析此首先对分立器件并联型叠层母排的电流路径进FigTheanalysisofthecurrentpathsonlaminatedusbarsintheswitchingtransient2.2并联支路寄生电感建模C p pFigTheparasiticinductancemodelforthelaminatedwithdiscretedevicesinparallel数目的增多而增多，因此该电感网络也会更加复件并联型叠层母排各并联支路的等效寄生电感进2.3并联支路等效电感的提取为u=Li(1)分别为a2ua1uuba2H1iiH2iLH1Mp1p2Lp2p2Ma1p2Ma2p2Mb1p2Mb2p2Mn1p2Mn2p2Mp1a1Mp2a1a1a1a1a2a1MMb1a1Mb2a1n1n1a1n2a1Mub2un1un2]TiL2iL1iL2]TMp1a2Mp2a2a1a1a2a2a2LMb1a2Mb2a2n1n1a2n2a2MMp1b1Mp2b1a1a1b1a2b1MLb1b1Mb2b1n1n1b1n2b1MMp1b2Mp2b2a1a1b2a2b2MMb1b2Lb2b2n1n1b2n2b2MMp1n1Mp2n1a1a1n1a2n1MMb1n1Mb2n1n1n1n1n2n1MMp1n2Mp2n2a1a1n2a2d2MMb1n2Mb2n2n2n2n2n2n2L]||中国电机工程学报第42卷iHLiHLii++up1up2一iH1uH1ua1ua2一+一一++ ub1ub2 一L1uL1一++ un1un2 一一一iiiiH2L2+uH2+uL2Fig.8Schematicforthederivationofequivalentinductance0Lp200000000a1a100000000a2a200000000Lb100000000Lb200000000n1n10Ln2」Ln2」00000QD小或|(3)|(3)AT|iH2|=iL「uH1]||Au=|uH2|uL1|A其中系数矩阵A为A010010010010000100000000|||0010000100100]0000ALAT=(6)系满足式(7)，同时桥臂电压因并联关系可表达成「iH1]「10]「uH1]||=|联立式(6)—(8)，即可得到式(9)。式(9)的推导|iL1||0|iL1||00]110]L=ALATs式(9)给出了各并联支路电流与总电流的比例该方法首先依据原始多维电感矩阵与解耦后的等文献[18]提出减少母排电流方向的长度，增加第10期於少林等：基于分立器件并联型碳化硅逆变器的叠层母排设计研究3743 n pDL1 LDL2 LSH1ADH1CSH2DH21pCDL1 n pDL1 LDL2 LSH1ADH1CSH2DH21pCDL1 LCDL2 LSH1ADH1CSH2DH2B1yp 24d3 n CdDL11DL2 LSL2y=ypSACp HDdDH2CCSSASSdCSS3.1电容正负端子以及桥臂器件位置类布局中，电容正负端子连线与器件端子垂直。AC nCC pCSSDH2 HSSDL2 LSH1ADH1ACSL1ADL1 2(a)A类布局CSSDH2 HpSCpSDL2 LSH1ADH1CSL1DL1B2(b)B类布局Fig9ThemainlayoutsofcomponentsonthebusbarQD种布局耦计算方法可得到各支路的等效电感矩阵Le。各支路等效电感Lp10011001100]||||111111(10)通过上述流程得到的结果如图10所示。在寄B505LLp1Lp2A1A2B1B2式Fig10Comparisonoftheparasiticinductanceforourlayouts3.2关键物理尺寸寻优是影响各并联支路寄生电感的关键参数。在Q3Dwx0xThekeyphysicaldimensionsLpi/nHLpi/nHLpi/nHLpLpi/nHLpi/nHLpi/nHLpi/nHLpi/nHLpi/nHCn1Cp1Cn2Cp2DL1 LDL2 LSH1ADH1CSH2DH2子SS中国电机工程学报第42卷Lp2Lp2Lp2Lp1LpLp1400808120d1/mm120d1/mm0d2/mmLp2Lp1LpLp1Lp18880204060020406080d2/mmd3/mmLp2Lp140Lp2Lp1406080wmmLp18880200p/mm(f)交流出线端子位置p响Fig.12Theeffectofkeyphysicaldimensionsoneparasiticinductance并联支路电感随着d4的增大而增大。因此在设计w生电感几乎无影响。这是因为与交流母排连接的上下桥臂端子间的距离主要由d6)交流出线端子p的位置：交流母排伸出出线端子与负载相连。在图11中，使p点沿着y=yp流母排出线端子的位置对并联支路的电感影响3.3电容端子数量对寄生电感影响本节探究电容端子数对叠层母排寄生电感的支路对应的电容与器件端子间的电流路径随着端Cn1Cp1Cn2Cp2Cn3Cp3SSDL1 LSSDL2 LSH1ADH1CSH2DH2子(a)多对电容端子并联示意图865101520253035405d2/mmFigTheeffectofthenumberofterminalsusedtoecttocapacitorsontheparasiticinductance4.1叠层母排结构与样机第10期於少林等：基于分立器件并联型碳化硅逆变器的叠层母排设计研究3745器件与散热器ink Sink3器件与散热器ink Sink3T并联器件个数以灵活扩展系统功率。图14(b)为六交流输出和电容相连和上桥臂器件相连和下桥臂器件相连(a)单相母排结构叠层叠层母排电容模组b并联型SiC样机FigThelaminatedbusbarandtheprototype4.2仿真验证D设置相应的激励源(source)和汇(sink)，从而提取叠多个电流源(source)。如按照正常的电流流向赋激励，则无法进行仿真。根据文献[36]，可对叠层母图15所示。对于最终仿真得到的电感矩阵，只需将该通入反向电流的母排支路与其他母排支路的交流母排ink正母排负母排DFig.15TheexcitationassignmentofthesimulationmodelinQ3D经过取反处理并通过解耦计算得到的母排各并联lentinductanceofthebusbarwithedLpLaLLbLnLLtotal1479028777378497577697在分立器件并联型叠层母排设计的关键物理液冷散热器结构如图16所示，通过热仿真软件直流源ds1Lcap环路ALa1a1CLa6a6ACLb6b6...SL6Ln6n6Fig直流源ds1Lcap环路ALa1a1CLa6a6ACLb6b6...SL6Ln6n6FigThestructureofthewater-coolingradiatoriS中国电机工程学报第42卷示波示波器辅助电源控制板SiC逆变器WVU负载直流源上位机图17所示，仿真中的芯片热耗均设置一致，因此其温度分布差异主要是由于其在散热器中的位置这是因为中间位置各管之间存在着较强的热耦合6565123456.5进水口进水口efielddistributionoftheparalleledcesintheupperbridgearmofWphase4.3实验验证VLloop=ovier(11)tFig8TheplatformofthedoublepulsetestPPLp1p1LLp1p1Lp6p6 H1S H H1S++一Lb1b1SL1LLn1n1NFigThecorrespondingtestedcircuits电压Vd1。同时将ds则会产生对应的过电压Vds1，该回路电感包含了入的电感(Lother)。当测试正母排和交流母排端电压Vd组电感(LC)，下桥臂tt第10期於少林等：基于分立器件并联型碳化硅逆变器的叠层母排设计研究3747V(50V/格)I(20A/格)V(50V/格)I(20A/格)MOSMOSMOSMOSVVds1VIds1tt100ns/格)Fig.20Thedoublepulsetestwaveformsofhefirstbranch试中通过热敏电偶来实现对各并联器件的壳温测edinductanceofthefirstbranchLH1=Lp1+La1(nH)isonofthetestedandcalculatedentinductanceoftheupperbridgearmLH/nH123456数据记录仪测温线(a)测温线载侧配电柜进水口高低温试验箱载箱水冷式冷水机载箱(b)温升实验平台Fig.21ThemeasurementforcasetemperatureoftheparalleldevicesLmin逆变器开关W器件测温。MOSMOSMOS0000Fig.22ThecasetemperaturecurveofheparalleledMOSFETs中国电机工程学报第42卷5结论断叠层母排设计的优劣性提供依据。借助于Q3D[2]GUZhanbiao，TANGJiacheng，ZHUWenming，etalComparisonofwide-bandgapdevicesin1kV，3kWLLCconverters[J]．ChineseJournalofElectricalewonsiliconcarbidepowerdevicestechnologiesnesenese硅电机控制器研究[J]．中国电机工程学报，2019，onhighpowerdensitySiCmotordrivecontrollereseinvertersusingamultilevelconvertercomposedoflowEETransactionsonPowerbandgapdevicesinACelectricdrives：opportunitiesandDAonanddesignofSiCBasedhighpowerdensityinverter，70kW/liter，50kW/kg[C]//Proceedingsofthe2016IEEE8thInternationalPowerCinverterforelectricvehicletractiondrives[C]//Proceedingsof2017IEEEAppliedPowerElectronicsConferenceandExposition．Tampa：IEEE，2017：742．nmethodologyforaplanarizedhighpowerdensityEV/HEVtractiondriveusingSiCpowermodules[C]//Proceedingsof2016IEEEEnergyConversionCongress[11]陈茜兵．驱动电机IGBT单管并联方案控制及应用CHENXibing．ControlandapplicationofIGBTsingle-tubeparallelconnectionschemefordrivingmotorP．Parallel-operationofdiscreteSiCBJTsinaconverterJIEEEics-2491．[13]赵阳．电动汽车碳化硅逆变器设计[D]．长沙：湖南大Jandimplementationofintelligentpowerunitfordiscrete2-47(inChinese)．第10期於少林等：基于分立器件并联型碳化硅逆变器的叠层母排设计研究3749eprofileorientedlifetimeassessmentofSiCinverterforMOSFETscurrentdistribution[J]．Semiconductoreismatchesonautomotivetractiondrives，opportunitiesandchallengesparallelingsiliconcarbideMOSFETs[J]．IEEEBandgapPowerDevicesandApplications．Albuquerque：[26]曾正，邵伟华，胡博容，等．基于耦合电感的SiCpotentialimpactofusingtractioninverterswithSiCZENGZheng，SHAOWeihua，HUBorong，etal．ActiveYUShaolinZHANGXingWANGJianingEffectofkeyforthelaminatedbusbarconnectedwithparalleledSiCphysicalstructuresonlaminatedbusbarinductanceofMOSFETs[J]．IEEETransactionsonCircuitsandSystemss[19]CALLEGAROAD，GUOJing，EULLM，etal．Busbarcurrentanalysisanditssuppressionmethodologyfordesignforhigh-powerinverters[J]．IEEETransactionsonparallelSiCMOSFETswithaidofadifferentialmodeEBBusingZHAOChengWANGLailiZHANGFanEffectof1.7kV，400aSiCMOSFETsoperatingat100kHz[C]//asymmetriclayoutandunequaljunctiontemperatureonProceedingsof2016IEEEEnergyConversionCongresscurrentsharingofparalleledSiCMOSFETswithZHUJunjie，YUANJingxin，NIEZiling，etal．Optimuminparalleledapplications[C]//Proceedingsof2014IEEEdesignofplanerbusbarbasedonall-siliconcarbidepowerAppliedPowerElectronicsConferenceandoflowinductivebusbarforfastswitchingSiCmodules并联功率模块不均流研究[J]．电源学报，2019，17(4)：verifiedby3DFEMcalculationsandlaboratory193-200．measurements[C]//Proceedingsofthe2016IEEE17thMAJianlin，WANGLi，RUANLigang．ResearchonWorkshoponControlandModelingforPowercurrentimbalanceinparallelingSiCMOSFETmulti-chipEuropeanConferenceonPowerElectronicsand1826-1836．namic[24]黄华震，柯俊吉，孙鹏，等．寄生电感不匹配对SiCcurrentsharingofmultichipSiCmodulewithoptimal中国电机工程学报第42卷KVAthreephaseNPCthree-leveluniversalinvertermodulewithspecificallydesignedbusbarCProceedingsoftheTwentyFifthAnnualIEEEAppliedPowerElectronicsConferenceandZHANGNing，WANGShuo，ZHAOHui．DevelopparasiticinductancemodelfortheplanarbusbarofanerJIEEETransactionssoflaminatedbusbartoreducetransientvoltagespike[C]//Proceedingsof2012IEEEInternationalSymposiumonal．Partialstrayinductancemodelingandmeasuringofasymmetricalparallelbranchesonthebus-barofelectricK．Multi-branchinductanceextractionprocedureformulti-chippowermodules[C]//Proceedingsofthe2016IEEE4thWorkshoponWideBandgapPowerDevicesand[38]於少林．中大功率光伏系统共性结构寄生参数分析ofparasiticparametersofcommonstructureinmedium&highpowerphotovoltaicsystemsnologyinese的功率模块热阻抗物理模型[J]．中国电机工程学报，thermalimpedancemodelforpowermodulebyanalyticesbasedheatspreadingangleJProceedingseofalowparasiticinductanceSiCpowermodulewithdouble-sidedcooling[C]//Proceedingsof2017IEEEAppliedPowerElectronicsConferenceandlowinductancepowermodulepackageJIEEE7-4166．L=ALATsA10011001将式(A3)代入式(8)：(A3)「1|「1||||0L100]01001(Ls)一1|A式(A1)中，即得式(9)：||||||||0]000100012-03-28。-07-04。方向为新型功率器件封装与应用、电力电；研究方向为电力电子电力传动、新能源发鲜艳)ExtendedSummaryDOI：10.13334/j.0258-8013.pcsee.211449ThecasetemperatureofdevicesTe/CHeatsinkYZXThecasetemperatureofdevicesTe/CHeatsinkYZXUACoutputWntheDesignofLaminatedBusbarBasedonDiscreteDevicesinaralleltotheSiliconCarbideInverterngineeringandAutomationHefeiUniversityofTechnologyKEYWORDSsiliconcarbideSiCinvertersdiscretedevicesinparallel;thelaminatedbusbar;parasiticinductancesAtthisstage,theSiliconCarbide(SiC)powermoduleshavedisadvantagesinhighcost,incompatiblepackages,andlowavailability.While,thediscretedevicesaremostlybasedonstandardpackages,withhighproductionvolumeandlowercost.ItismeaningfultodevelopSiCinvertersbasedonthetechnologyofdiscretedeviceinparallel.InmediumandhighpowerSiCinverters,thelaminatedbusbarisusuallyusedastheinterconnectioncarrierforbuscapacitorsandpowerdevices.Thispaperinvestigatesthedesignmethodofthelaminatedbusbarwiththeaimoflowparasiticinductance,externalcircuitsymmetryandtemperaturehomogeneity.Basedonthemethod,alaminatedbusbarstructureforSiCinverterswithsixdiscretedevicesinparallelisfinallydesigned.Firstly,takingtwodevicesinparallelasanexample,thestructuralcharacteristicsofthelaminatedbusbarareanalyzed.Themainlayoutofthepowerdevices,thecapacitor,theheatsinkandthedriverboardisdetermined,asshowninFig.1.Then,thebusbarparasiticinductanceismodeledandanalyzed,sothattheequivalentparasiticinductanceofeachparalleldevicescanbequicklyextractedfromthecomplexinductancenetwork.Itcanprovideabasisforestimatingtheinductancevalueandthesymmetrydesignofbusbars.Finally,AnsysQ3Disusedtoextractthebusbarparasiticinductancenetwork.