第二章 TS201内部组成

1、RegisterFile32x32DABInternal Buses 128 x 464128128MULMACALUCLUSHFTCTRL & Dependency CheckingCompute Block XMemoryMapped Reg FileALUMAC SHFTUnmapped 031XR 31XR 0.32-bitsX computation blockYR 31YR 0Y computation block.32-bitsALUComputation block XRegisterFile0STATUSALUMultShiftPRMRBFOTMP31_ _ R _寄存器名称

2、寄存器名称寄存器宽度选择，寄存器宽度选择，R# 或或 R#:#。如：如：R1代表单寄存器（代表单寄存器（32位），位），R1:0代表双寄代表双寄存器（存器（64位），位），R3：0代表四寄存器（代表四寄存器（128位）位）运算数据类型选择，运算数据类型选择，B（字节（字节/8位），位），S（短字（短字/16位），位），none（正常字（正常字/32位），位），L（长字（长字/64位），位）， F（浮点型（浮点型/32位或位或40位）位）运算块选择，运算块选择，X，Y，none/XY注意最小标号注意最小标号的取值的取值如果出现非法的浮点操作，如果出现非法的浮点操作，此标志位将被置位此标志位将被置

3、位Comp block XALUMultShiftReg FileMR1:0MR3:216MR4310MR0MR316MR4310824MR2MR1MR0MR316MR4310824MR2MR14122028MR0MR2MR1MR3HLHLHLHLL = low short fieldH = high short field结果是长字的MR4结果是正常字的MR4结果是短字的MR4Comp block XALUMultShiftReg FileJ-B US D A TAIA BP CB TBA D D RF E TC HYC O M P U T EB LO C K SJ-B U S A D D

4、RK -B U S D A T AK -B U S A D D RI-B U S D A T AI-B U S A D D RIN TE G E RK A LUIN TE G E RJ A LU323232X 3232X 32DA B128128321283212832128D A T A A D D RE S S G E N E R A TIO NP R O G R A MS E Q U E N C E RXC O M P U TEB LO C KD A B128128 RegisterFileJ/KR30:0031J/KB3:0J/KL3:0 J/KStat30J and K IALUs

5、ALU存储地址获取单元分支目标缓冲（BTB）中断响应单元程序计数器（PC） 32 bit fetch address指令对齐缓冲（IAB）128-bit 指令ALU, MAC, Shifter, IALUMemoryInterrupts增量中断 InstructionInstructionInstructionInstructionInstructionLoopN TimesInstructionInstructionInstructionR TIInstructionInstructionInstructionR E TSInstructionInstructionInstructionC

6、ALLInstructionInstructionInstructionInstructionInstructionInstructionInstructionInstructionAddress:nn + 1n + 5n + 4n + 3n + 2Linear FlowJ U M PInstructionInstructionInstructionInstructionInstructionJumpSubroutineInterruptIdleID LEInstructionInstructionInstructionInstructionInstructionInterruptCJMPRT

7、I/RETILC0 = N0 3MSSD0 1MS存储块的物理结构Half-Segment 0ofSegment 0Half-Segment 1ofSegment 0Page 0 Sub-Array 0Page 0 Sub-Array 1Page 1 Sub-Array 0Page 1 Sub-Array 1Page 511 Sub-Array 0Page 511 Sub-Array 1Page 0 Sub-Array 2Page 0 Sub-Array 3Page 1 Sub-Array 2Page 1 Sub-Array 3Page 511 Sub-Array 2Page 511 Sub-Array 3n 0 x00000n 0 x10000n 0 x1FFFFn0 x00000n0 x00040n0 x00080n0 x000C0n0 x0FF80n0 x0FFC0n0 x10000n0 x10040n0 x10080n0 x100C0n0 x1FF80n0 x1FFC0TRANSMITTERTCBREGISTERSRECEIVERTCBREGISTERSDMA CONTROLLERDMAREQUESTSINTERNALBUSINTERFA