VPX_Overview

1、VPX VITA 46 Overview Agenda Introduction VITA 46 Compliance Common Module Requirements 3U Module 6U Module Backplanes System VPX-REDI/OpenVPX/PMC/XMC Agenda Introduction VITA 46 Compliance Common Module Requirements 3U Module 6U Module Backplanes System VPX-REDI/OpenVPX/PMC/XMC VITA Standards VITA S

2、tandards Based on VME bus VPX ANSI standard (ANSI/VITA 46.0-2007) Defined by VITA (VME International Trade Association) working group VITA: Composed of major companies such as Boeing, Curtiss-Wright, Elma Electronic, GE Intelligent Platforms, Kontron, Mercury Computer Systems and Northrop Grumman VI

3、TA Standards cont VITA Standard StandardContent VITA 41VXS: VME Switched Serial VITA 42XMC: Switched Mezzanine Card VITA 46VPX VITA 48VPX REDI VITA 65Open VPX VITA Standards cont Explosion of System Connectivity Standards VPX Technology Overview Technologies calling for VPX include: 3U and 6U format

4、s 7-row high speed connector rated up to 6.25 Gbps Choice of high speed serial fabrics PMC and XMC mezzanines Hybrid backplanes to accommodate VME64, VXS and VPX boards VPX Highlights uRetain standard 6U and 3U form-factors uHeight, depth, pitch, front panel arrangements, conduction-cooled interface

5、s, etc. u Support standard-length PMC and XMC modules uSupport high-speed serial fabric on the backplane uTyco MultiGig RT2, 7-row connector uSupport VME and PCI interfaces for legacy compatibility uProvision for optical connectors as option uSupport improved logistics uProvide support for Line Repl

6、aceable Module (LRM) applications with connector ESD protected u Alignment and keying blocks VPX Specifications Basic Module VITA 46.0VPX Base Standard VITA 46.1VMEbus Signal Mapping on VPX VITA 46.3Serial RapidIO on VPX Fabric Connector VITA 46.4PCI Express on VPX Fabric Connector VITA 46.6Gigabit

7、Ethernet Control Plane on VPX VITA 46.7Ethernet on VPX Fabric Connector VITA 46.9PMC/XMC/Ethernet Signal Mapping to 3U/6U on VPX VITA 46.10Rear transition module on VPX VITA 46.11System Management on VPX VITA 46.12Fiber Optic Interface on VPX VITA 46.13Fibre channel on VPX VITA 46.20Switch slot defi

8、nition on VPX VITA 46.21Distributed switching topologies Goal of VPX uProvide mil/aero system integrators with a more capable module standard that allows for better exploitation of new technologies, enabling more cost effective end systems VPX: Advantages Technology changes driving the need for a ne

9、w standard uParallel busses are being replaced by serial fabrics for local communications uPCI Express, Advanced Switching Interconnect, Serial RapidIO, 10 GbE XAUI u Fibre channel, Infiniband, IEEE-1394 uStandard I/O interfaces are also moving to high-speed signals uVideo DVI, LVDS, SMPTE 292M (HDT

10、V) u Storage Fibre Channel, SATA, Serial attached SCSI u Sensor Serial FPDP, Xilinx RocketIO uDensity improvements at chip level drive need for more I/O pins at the board levels uExisting products already exceed VME 205-pin capacity VPX: Advantages cont uHigher performance uMore high-speed I/O pins

11、uOpen topology allowing hybrid systems uIncreased power uBetter cooling uBetter maintenance Comparison of VME/VXS/VPX Products VPX3-127 3U VPX Freescale MPC8640D VPX6-1957 6U VPX Intel Core i7 Ivy Bridge SBC Agenda Introduction VITA 46 Compliance Common Module Requirements 3U Module 6U Module Backpl

12、anes System VPX-REDI/OpenVPX/PMC/XMC VITA 46 Backplane Minimum Features A VITA46 compliant backplane will incorporate at least the following features: u Connectors which meet the requirements of this standard u Connectors in sets which meet the requirements of this standard u Keying mechanism for al

13、l slots u Alignment mechanism for all slots u Comply with one or more of the various protocol layer standards VITA 46 Plug-in Module Minimum Features uBe compatible with the mechanical (outer envelope) dimensions of IEEE 1101.1 (for air cooled plug-in modules) or IEEE 1101.2 (for conduction cooled p

14、lug-in modules). uConnectors as specified in this document uConnectors in sets which meet the requirements of this standard uKeying mechanism uAlignment mechanism uComply with one or more of the various protocol layer standards Agenda Introduction VITA 46 Compliance Common Module Requirements 3U Mod

15、ule 6U Module Backplanes System VPX-REDI/OpenVPX/PMC/XMC Connectors uVersion of Tyco MultiGig RT2 u Depth fits allows typical stiffening bar and standard-length PMC u 7-row 16-wafer construction u Power, differential, and single-ended wafers u Built in ESD grounding protection u No backplane pins to

16、 break! Connectors cont Connectors cont Form Factor and Outline uEurocard Standard uIEEE 1101.1 uIEEE 1101.2 Conduction Cooled Eurocards uAir cooled or Conduction cooled plug-in modules u3U or 6U plug-in modules u3U: 100mm x 160mm u6U: 233mm x 160mm Basic VMEbus Card Dimension Form Factor and Outlin

17、e cont Form Factor and Outline cont Alignment and Keying u3U plug-in module: Two alignment-guiding devices u6U plug-in module: Three alignment-guiding devices uProvide a safety ground path between the plug-in module and the appropriate chassis grounding point. n 3U: 5 x 5 =25 key settings n 6U: 5 x

18、5 x 5 =125 key settings Connector Pin Definition P0 Signal Definition -P0 uPower Contacts uHigh voltage power inputs: Vs1/2 -12V/48V uKeying used to differentiate plug-in modules by power acceptability uVs3: lower power inputs uGeographical Addressing uGA4:0* plus GAP*: Pins allocated for system-wid

19、e geographical addressing uNon-Volatile Memory Read Only -Optional uNVMRO: When asserted, prevents any non-volatile memory from being updated uReference Clock -Optional uDifferential pair bussed to each VITA 46 slots uProvide a common clock for inter-board synchronization and timing uProvide a refer

20、ence clock for PCI Express so that Spread Spectrum Clocking can be supported uReserved for Future Use Differential Pair uRFUA+/- uJTAG Pin Allocation uSystem Management Connections -Optional uSM1:0 u3.3V 12V AUX -Optional uSystem Reset -Optional Connector Pin Definition P1 uP1 shall be loaded with s

21、ixteen differential wafers Agenda Introduction VITA 46 Compliance Common Module Requirements 3U Module 6U Module Backplanes System VPX-REDI/OpenVPX/PMC/XMC Connectors 3U Module uDimensions depending on whether it is air cooled or conduction cooled uCompatible with IEEE 1101.1 and 1101.2 form factors

22、, thus 3U by 160mm by 4HP/5.08mm pitch. Connectors Pin Definitions 3U Module P2 uP2: User Defined Connector uFor applications where a connector is not required, or of a type which is not compatible with the MultiGig RT2 7Row connector family (fiber optic, or coax, for example), this location is avai

23、lable for mounting an appropriate connector uWhen the plug-in module application calls for connector location P2 to be omitted, the connector P1 location shall be populated with a Rightend differential module. uStandard P2 uDifferential Connector Allocation uSingle Ended Connector Allocation Agenda

24、Introduction VITA 46 Compliance Common Module Requirements 3U Module 6U Module Backplanes System VPX-REDI/OpenVPX/PMC/XMC Connectors 6U Module uDimensions depending on whether it is air cooled or conduction cooled uCompatible with IEEE 1101.1 and 1101.2 form factors, thus 6U by 160mm by 4HP/5.08mm p

25、itch. Connector Pin Definition uP2/P3/P4 uDifferential uSingle Ended uUser defined connectors uConnector locations P5 and P6 shall be designated as user defined uDifferential uSingle Ended VITA 46.1 - VME on VITA 46 Module VITA 46.9 - PMC/XMC Mappings for VITA 46 uAllows a VITA 46 module format to i

26、nterface to existing VME board uTwo primary options defined for 6U case uOption A u64 signals from Pn4 u24 (12 pairs) signals from Pn6 uOption B u40 (20 pairs) signals from Pn6 u38 single-ended signals from Pn6 u10 signals from Pn4 Agenda Introduction VITA 46 Compliance Common Module Requirements 3U

27、 Module 6U Module Backplanes System VPX-REDI/OpenVPX/PMC/XMC Backplane Overview Backplane Overview cont Power Delivery uUnless restricted by the system design, each slot is capable of providing the current shown in Table 6-1 VITA 46 Slot Numbering uThe leftmost slot (viewed from the plug-in module i

28、nsertion side with P0 at the top) of a backplane shall have a geographic address of 1. uGA0*, GA1*, GA2*, GA3*, GA4* and GAP* Required Connections uJTAG Pin Allocation uSystem Management Connections uSystem Reference Clock uNon-Volatile Memory Read Only u3.3V AUX uSYSRESET* Agenda Introduction VITA

29、46 Compliance Common Module Requirements 3U Module 6U Module Backplanes System VPX-REDI/OpenVPX/PMC/XMC System uSafety Ground uThe Alignment/Keying device is designed to provide the safety ground path between the plug-in module and the backplane uPower Supply uCapacity uVoltage Levels uDielectric Se

30、paration uSlot Type Indication uGlyphs uA quick eye-readable method of slot type identification, allowing an operator or technician to determine compatibility issues without having to resort to examination of connector types on both backplane and plug-in modules. Agenda Introduction VITA 46 Complian

31、ce Common Module Requirements 3U Module 6U Module Backplanes System VPX-REDI/OpenVPX/PMC/XMC VPX -REDI uVPX-REDI: VITA 48 uDefines a general mechanical design implementation for Eurocards such as VMEbus and VPX that enhances thermal performance and structural integrity as well as providing for Two L

32、evel Maintenance (2LM) compatibility uGives an overview of the associated plug-in units for air-cooling, conduction cooling, and liquid cooling applications. uDefine applicable detailed dimensions of key plug-in unit and sub-rack interfaces VPX REDI cont Two Level Maintenance Features Line Replaceab

33、le Module Feature uCovers over Electronic Components for ESD and handling protection From VPX to OpenVPX uVPX is a very large, flexible specification uDesigned to address many industry needs VPX From VPX to OpenVPX uVPX is a very large, flexible specification uDesigned to address many industry needs

34、 uProblem is. uMany possible implementations possible within the base and dot specifications uLeads to interoperability issues VPX From VPX to OpenVPX uVPX is a very large, flexible specification uDesigned to address many industry needs uProblem is. uMany possible implementations possible within the

35、 base and dot specifications uLeads to interoperability issues VPX OpenVPX From VPX to OpenVPX uOpenVPX is a defined set of system implementations within VPX uProvides a framework for interoperability between modules and backplanes uIt is intended to be extensible uIncludes existing implementation definitions u