江璐EDA实验四

1、一、系统设计说明1、波形发生器的系统结构图2、设计说明（1）系统工作原理顶层文件SINGT.vhd在FPGA中实现，包含两个部分：波形发生器控制模块，即ROM的地址信号发生器，由6为计数器担任；六位计数器产生一个六位宽的地址，每个地址对应一个波形数据，六位对应64个波形数据，每个地址的发生即调用一个波形数据。地址发生器的时钟CLK的输入频率f0与每周期的波形数据点数，以及D/A输出频率f的关系是：ff0/6。两部分模块组合完成8位波形数据输出，经过数模转换，转换模拟的信号，然后在示波器上显示。（2）波形发生器控制模块6位二进制计数器（即64进制计数器）为地址发生器，产生地址数据，并输送到ROM

2、相应的地址信号输入端，控制ROM的正弦波数据输出。（3）波形数据存储模块（ROM）波形数据存储模块ROM用于存储正弦波数据，每个数据都有对应的地址数据，从而当ROM接收到来自地址发生器的地址数据时，就输出相应地址的正弦波数据（正弦波数据由8位的二进制数表示）。当64个正弦波数据全部输出时为一个周期结束，从而返回初始状态从新计数输出正弦数据。2、 实验记录1、电路原理图2、顶层文件的程序3、ROM元件- megafunction wizard: %ROM: 1-PORT%- GENERATION: STANDARD- VERSION: WM1.0- MODULE: altsyncram - =-

3、 File Name: ROM78.vhd- Megafunction Name(s):- altsyncram- Simulation Library Files(s):- altera_mf- =- *- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!- 7.2 Build 151 09/26/2007 SJ Web Edition- *-Copyright (C) 1991-2007 Altera Corporation-Your use of Altera Corporations design tools, logic

4、functions -and other software and tools, and its AMPP partner logic -functions, and any output files from any of the foregoing -(including device programming or simulation files), and any -associated documentation or information are expressly subject -to the terms and conditions of the Altera Progra

5、m License -Subscription Agreement, Altera MegaCore Function License -Agreement, or other applicable license agreement, including, -without limitation, that your use is for the sole purpose of -programming logic devices manufactured by Altera and sold by -Altera or its authorized distributors. Please

6、 refer to the -applicable agreement for further details.LIBRARY ieee;USE ieee.std_logic_1164.all;LIBRARY altera_mf;USE altera_mf.all;ENTITY ROM78 ISPORT(address: IN STD_LOGIC_VECTOR (5 DOWNTO 0); inclock: IN STD_LOGIC ; q: OUT STD_LOGIC_VECTOR (7 DOWNTO 0);END ROM78;ARCHITECTURE SYN OF rom78 ISSIGNA

7、L sub_wire0: STD_LOGIC_VECTOR (7 DOWNTO 0);COMPONENT altsyncramGENERIC (clock_enable_input_a: STRING;clock_enable_output_a: STRING;init_file: STRING;intended_device_family: STRING;lpm_hint: STRING;lpm_type: STRING;numwords_a: NATURAL;operation_mode: STRING;outdata_aclr_a: STRING;outdata_reg_a: STRIN

8、G;widthad_a: NATURAL;width_a: NATURAL;width_byteena_a: NATURAL);PORT (clock0: IN STD_LOGIC ;address_a: IN STD_LOGIC_VECTOR (5 DOWNTO 0);q_a: OUT STD_LOGIC_VECTOR (7 DOWNTO 0);END COMPONENT;BEGINq BYPASS,clock_enable_output_a = BYPASS,init_file = romd.mif,intended_device_family = Cyclone II,lpm_hint

9、= ENABLE_RUNTIME_MOD=YES, INSTANCE_NAME=NONE,lpm_type = altsyncram,numwords_a = 64,operation_mode = ROM,outdata_aclr_a = NONE,outdata_reg_a = UNREGISTERED,widthad_a = 6,width_a = 8,width_byteena_a = 1)PORT MAP (clock0 = inclock, address_a = address, q_a = sub_wire0);END SYN;- =- CNX file retrieval i

10、nfo- =- Retrieval info: PRIVATE: ADDRESSSTALL_A NUMERIC 0- Retrieval info: PRIVATE: AclrAddr NUMERIC 0- Retrieval info: PRIVATE: AclrByte NUMERIC 0- Retrieval info: PRIVATE: AclrOutput NUMERIC 1- Retrieval info: PRIVATE: BYTE_ENABLE NUMERIC 0- Retrieval info: PRIVATE: BYTE_SIZE NUMERIC 8- Retrieval

11、info: PRIVATE: BlankMemory NUMERIC 0- Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_A NUMERIC 0- Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_A NUMERIC 0- Retrieval info: PRIVATE: Clken NUMERIC 0- Retrieval info: PRIVATE: IMPLEMENT_IN_LES NUMERIC 0- Retrieval info: PRIVATE: INIT_FILE_LAYOUT STRING POR

12、T_A- Retrieval info: PRIVATE: INIT_TO_SIM_X NUMERIC 0- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING Cyclone II- Retrieval info: PRIVATE: JTAG_ENABLED NUMERIC 1- Retrieval info: PRIVATE: JTAG_ID STRING NONE- Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC 0- Retrieval info: PRIVATE: MIFfilen

13、ame STRING romd.mif- Retrieval info: PRIVATE: NUMWORDS_A NUMERIC 64- Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC 0- Retrieval info: PRIVATE: RegAddr NUMERIC 1- Retrieval info: PRIVATE: RegOutput NUMERIC 0- Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING 0- Retrieval info: PRIVATE: Sing

14、leClock NUMERIC 0- Retrieval info: PRIVATE: UseDQRAM NUMERIC 0- Retrieval info: PRIVATE: WidthAddr NUMERIC 6- Retrieval info: PRIVATE: WidthData NUMERIC 8- Retrieval info: PRIVATE: rden NUMERIC 0- Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_A STRING BYPASS- Retrieval info: CONSTANT: CLOCK_ENABLE_OU

15、TPUT_A STRING BYPASS- Retrieval info: CONSTANT: INIT_FILE STRING romd.mif- Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING Cyclone II- Retrieval info: CONSTANT: LPM_HINT STRING ENABLE_RUNTIME_MOD=YES, INSTANCE_NAME=NONE- Retrieval info: CONSTANT: LPM_TYPE STRING altsyncram- Retrieval info: C

16、ONSTANT: NUMWORDS_A NUMERIC 64- Retrieval info: CONSTANT: OPERATION_MODE STRING ROM- Retrieval info: CONSTANT: OUTDATA_ACLR_A STRING NONE- Retrieval info: CONSTANT: OUTDATA_REG_A STRING UNREGISTERED- Retrieval info: CONSTANT: WIDTHAD_A NUMERIC 6- Retrieval info: CONSTANT: WIDTH_A NUMERIC 8- Retrieva

17、l info: CONSTANT: WIDTH_BYTEENA_A NUMERIC 1- Retrieval info: USED_PORT: address 0 0 6 0 INPUT NODEFVAL address5.0- Retrieval info: USED_PORT: inclock 0 0 0 0 INPUT NODEFVAL inclock- Retrieval info: USED_PORT: q 0 0 8 0 OUTPUT NODEFVAL q7.0- Retrieval info: CONNECT: address_a 0 0 6 0 address 0 0 6 0-

18、 Retrieval info: CONNECT: q 0 0 8 0 q_a 0 0 8 0- Retrieval info: CONNECT: clock0 0 0 0 0 inclock 0 0 0 0-Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all- Retrieval info: GEN_FILE: TYPE_NORMAL ROM78.vhd TRUE- Retrieval info: GEN_FILE: TYPE_NORMAL ROM78.inc FALSE- Retrieval info: GEN_FILE: TYPE_NORMAL ROM78.cmp TRUE- Retrieval info: GEN_FILE: TYPE_NORMAL ROM78.bsf TRUE FALSE- Retrieval info: GEN_FILE: T