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.,TechnicalEnglish,ForInformationScienceandElectronicEngineering,.,Unit2,IntegratedCircuits,.,PartI,TheIntegratedCircuit,3,NewWords,4,NewWords,5,1,Digitallogicandelectroniccircuitsderivetheirfunctionalityfromelectronicswitchescalledtransistor.Roughlyspeaking,thetransistorcanbelikenedtoanelectronicallycontrolledvalvewherebyenergyappliedtooneconnectionofthevalveenablesenergytoflowbetweentwootherconnections.1,由称为晶体管的电子开关得到它们的(各种)功能,粗略地说,晶体管好似一种电子控制阀,由此加在阀一端的能量可以使能量在另外两个连接端之间流动。,6,1,Bycombiningmultipletransistors,digitallogicbuildingblockssuchasANDgatesandflip-flopsareformed.Transistors,inturn,aremadefromsemiconductors.Consultaperiodictableofelementsinacollegechemistrytextbook,andyouwilllocatesemiconductorsasagroupofelementsseparatingthemetalsandnonmetals.2,查阅大学化学书中的元素周期表,你会查到半导体是介于金属与非金属之间的一类元素。,7,1,Theyarecalledsemiconductorsbecauseoftheirabilitytobehaveasbothmetalsandnonmetals.Asemiconductorcanbemadetoconductelectricitylikeametalortoinsulateasanonmetaldoes.Thesedifferingelectricalpropertiescanbeaccuratelycontrolledbymixingthesemiconductorwithsmallamountsofotherelements.,可使半导体像金属那样导电,或者像非金属那样绝缘。,8,1,Thismixingiscalleddoping.Asemiconductorcanbedopedtocontainmoreelectrons(N-type)orfewerelectrons(P-type).Examplesofcommonlyusedsemiconductorsaresiliconandgermanium.PhosphorousandboronaretwoelementsthatareusedtodopeN-typeandP-typesilicon,respectively.3,N型硅半导体掺入磷元素,而P型硅半导体掺入硼元素。,9,2,Atransistorisconstructedbycreatingasandwichofdifferentlydopedsemiconductorlayers.Thetwomostcommontypesoftransistors,thebipolar-junctiontransistor(BJT)andthefield-effecttransistor(FET)areschematicallyillustratedinFigure2.1.,图2.1给出了双极型晶体管和场效应晶体管的图示。,10,2,Thisfigureshowsboththesiliconstructuresoftheseelementsandtheirgraphicalsymbolicrepresentationaswouldbeseeninacircuitdiagram.TheBJTshownisanNPNtransistor,becauseitiscomposedofasandwichofN-P-Ndopedsilicon.Whenasmallcurrentisinjectedintothebaseterminal,alargercurrentisenabledtoflowfromthecollectortotheemitter.,它们用于电路图中的符号,当小电流注入基极时,可使较大的电流从集电极流向发射极。,11,2,TheFETshownisanN-channelFET,whichiscomposedoftwoN-typeregionsseparatedbyaP-typesubstrate.Whenavoltageisappliedtotheinsulatedgateterminal,acurrentisenabledtoflowfromthedraintothesource.ItiscalledN-channel,becausethegatevoltageinducesanN-channelwithinthesubstrate,enablingcurrenttoflowbetweentheN-regions.,将电压加在绝缘的栅极上时,可使电流由漏极流向源极。,因为栅极电压诱导基底上的N通道,使电流能在两个N区域之间流动。,12,3,AnotherbasicsemiconductorstructureshowninFigure2.1isadiode,whichisformedsimplybyajunctionofN-typeandP-typesilicon.Diodesactlikeone-wayvalvesbyconductingcurrentonlyfromPtoN.,二极管的作用就像一个单向阀门,由于电流只能从P流向N。,13,3,Specialdiodescanbecreatedthatemitlightwhenavoltageisapplied.Appropriatelyenough,thesecomponentsarecalledlightemittingdiodes,orLEDs.Thesesmalllightsaremanufacturedbythemillionsandarefoundindiverseapplicationsfromtelephonestotrafficlights.,这种小灯泡数以百万计地被制造出来,有各种各样的应用,从电话机到交通灯。,14,4,Theresultingsmallchipofsemiconductormaterialonwhichatransistorordiodeisfabricatedcanbeencasedinasmallplasticpackageforprotectionagainstdamageandcontaminationfromtheoutsideworld.4,半导体材料上制作晶体管或二极管所形成的小芯片用塑料封装以防损伤和被外界污染。,15,4,Smallwiresareconnectedwithinthispackagebetweenthesemiconductorsandwichandpinsthatprotrudefromthepackagetomakeelectricalcontactwithotherpartsoftheintendedcircuit.,从封装内伸出以便与(使用该晶体管的)电路其余部分连接。,16,4,Onceyouhaveseveraldiscretetransistors,digitallogiccanbebuiltbydirectlywiringthesecomponentstogether.Thecircuitwillfunction,butanysubstantialamountofdigitallogicwillbeverybulky,becauseseveraltransistorsarerequiredtoimplementeachofthevarioustypesoflogicgates.,任何实质性的数字逻辑(电路)都将十分庞大,因为要在各种逻辑门中每实现一种都需要多个晶体管。,17,5,Atthetimeoftheinventionofthetransistorin1947byJohnBardeen,WalterBrattain,andWilliamShockley,theonlywaytoassemblemultipletransistorsintoasinglecircuitwastobuyseparatediscretetransistorsandwirethemtogether.In1959,JackKilbyandRobertNoyceindependentlyinventedameansoffabricatingmultipletransistorsonasingleslabofsemiconductormaterial.,购买多个分离的晶体管,将它们连在一起。,一种将多个晶体管做在同一片半导体材料上的方法,18,5,Theirinventionwouldcometobeknownastheintegratedcircuit,orIC,whichisthefoundationofourmoderncomputerizedworld.AnICissocalledbecauseitintegratesmultipletransistorsanddiodesontothesamesmallsemiconductorchip.Insteadofhavingtosolderindividualwiresbetweendiscretecomponents,anICcontainsmanysmallcomponentsthatarealreadywiredtogetherinthedesiredtopologytoformacircuit.,IC包含按照形成电路所要求的拓扑结构连在一起的许多小元件,而无需再将分立元件的导线焊接起来。,19,6,AtypicalIC,withoutitsplasticorceramicpackage,isasquareorrectangularsilicondiemeasuringfrom2to15mmonanedge.DependingontheleveloftechnologyusedtomanufacturetheIC,theremaybeanywherefromadozentotensofmillionsofindividualtransistorsonthissmallchip.,每一边2mm至15mm的方形或矩形硅片,在这种小片上可能有几十个到几百万个晶体管,20,6,Thisamazingdensityofelectroniccomponentsindicatesthatthetransistorsandthewiresthatconnectthemareextremelysmallinsize.DimensionsonanICaremeasuredinunitsofmicrometers,withonemicrometer(1mm)beingonemillionthofameter.Toserveasareferencepoint,ahumanhairisroughly100mmindiameter.SomemodernICscontaincomponentsandwiresthataremeasuredinincrementsassmallas0.1mm!,1微米是1米的百万分之一,21,6,Eachyear,researchersandengineershavebeenfindingnewwaystosteadilyreducethesefeaturesizestopackmoretransistorsintothesamesiliconarea,asindicatedinFigure2.2.,22,7,WhenanICisdesignedandfabricated,itgenerallyfollowsoneoftwomaintransistortechnologies:bipolarormetal-oxidesemiconductor(MOS).BipolarprocessescreateBJTs,whereasMOSprocessescreateFETs.Bipolarlogicwasmorecommonbeforethe1980s,butMOStechnologieshavesinceaccountedthegreatmajorityofdigitallogicICs.,此后MOS技术在数字逻辑集成电路中占据了大多数,23,7,N-channelFETsarefabricatedinanNMOSprocess,andP-channelFETsarefabricatedinaPMOSprocess.Inthe1980s,complementary-MOS,orCMOS,becamethedominantprocesstechnologyandremainssotothisday.CMOSICsincorporatebothNMOSandPMOStransistors.,占主导地位的加工技术,.,PartII,ApplicationSpecificIntegratedCircuit,25,NewWords,26,NewWords,27,NewWords,28,1,Anapplication-specificintegratedcircuit(ASIC)isanintegratedcircuit(IC)customizedforaparticularuse,ratherthanintendedforgeneral-purposeuse.Forexample,achipdesignedsolelytorunacellphoneisanASIC.Incontrast,the7400seriesand4000seriesintegratedcircuitsarelogicbuildingblocksthatcanbewiredtogetherforuseinmanydifferentapplications.,而不是通用的,7400与4000系列集成电路是可以用导线连接的逻辑构建模块,适用于各种不同的应用,29,2,Asfeaturesizeshaveshrunkanddesigntoolsimprovedovertheyears,themaximumcomplexity(andhencefunctionality)possibleinanASIChasgrownfrom5,000gatestoover100million.1,随着逐年来特征尺寸的缩小和设计工具的改进,ASIC中的最大复杂度从5000个门电路增长到了1亿个门电路,因而功能也有极大的提高。,30,2,ModernASICsoftenincludeentire32-bitprocessors,memoryblocksincludingROM,RAM,EEPROM,Flashandotherlargebuildingblocks.SuchanASICisoftentermedaSoC(System-on-Chip).DesignersofdigitalASICsuseahardwaredescriptionlanguage(HDL),suchasVerilogorVHDL,todescribethefunctionalityofASICs.,现代ASIC常包含32位处理器,包括ROM、RAM、EEPROM、Flash等存储器,以及其它大规模组件。,31,3,Field-programmablegatearrays(FPGA)arethemoderndayequivalentof7400serieslogicandabreadboard,containingprogrammablelogicblocksandprogrammableinterconnectsthatallowthesameFPGAtobeusedinmanydifferentapplications.Forsmallerdesignsand/orlowerproductionvolumes,FPGAsmaybemorecosteffectivethananASICdesign.,7400系列和面包板的现代版,较小规模的设计或(与)小批量生产,32,3,Thenon-recurringengineeringcost(thecosttosetupthefactorytoproduceaparticularASIC)canrunintohundredsofthousandsofdollars.2,不能循环的工程费用(建立工厂生产特定ASIC的成本)可能会达到数十万美元。,33,4,ThegeneraltermapplicationspecificintegratedcircuitincludesFPGAs,butmostdesignersuseASIConlyfornon-fieldprogrammabledevicesandmakeadistinctionbetweenASICandFPGAs.3,专用集成电路这一通用名词也包括FPGA,但是大多数设计者仅将ASIC用于非现场可编程的器件,将ASIC和FPGA两者区别开来。,34,5History,TheinitialASICsusedgatearraytechnology.Ferrantiproducedperhapsthefirstgate-array,theULA(UncommittedLogicArray),around1980.Customizationoccurredbyvaryingthemetalinterconnectmask.ULAshadcomplexitiesofuptoafewthousandgates.Laterversionsbecamemoregeneralized,withdifferentbasediescustomizedbybothmetalandpolysiliconlayers.SomebasediesincludeRAMelements.,多至几千个门电路的复杂度,适应用户的包含金属和多层硅的不同基底,35,6Standardcelldesign,Inthemid1980sadesignerwouldchooseanASICmanufacturerandimplementtheirdesignusingthedesigntoolsavailablefromthemanufacturer.Whilethirdpartydesigntoolswereavailable,therewasnotaneffectivelinkfromthethirdpartydesigntoolstothelayoutandactualsemiconductorprocessperformancecharacteristicsofthevariousASICmanufacturers.4,尽管有第三方设计工具,但第三方设计工具和不同的ASIC制造商的布线以及实际半导体工艺过程的性能之间却缺乏有效的联系。,36,6,Mostdesignersendedupusingfactoryspecifictoolstocompletetheimplementationoftheirdesigns.AsolutiontothisproblemthatalsoyieldedamuchhigherdensitydevicewastheimplementationofStandardCells.EveryASICmanufacturercouldcreatefunctionalblockswithknownelectricalcharacteristics,suchaspropagationdelay,capacitanceandinductance;thatcouldalsoberepresentedinthirdpartytools.5,每个ASIC制造商都可创造他们自己的具有已知电性能的功能块,如传播延迟器、电容、电感,这些都可以用第三方工具来表示(实现)。,37,6,Standardcelldesignistheutilizationofthesefunctionalblockstoachieveveryhighgatedensityandgoodelectricalperformance.StandardcelldesignfitsbetweenGateArrayandFullCustomdesignintermsofbothitsNRE(Non-RecurringEngineering)andrecurringcomponentcost.6,标准单元设计使门阵列和全定制设计之间在一次性投入的工程费用和循环元件成本方面相互适应。,Non-recurringengineering(NRE)referstotheone-timecostofresearching,designing,andtestinganewproduct.,38,7,Bythelate1980s,logicsynthesistools,suchasDesignCompiler,becameavailable.SuchtoolscouldcompileHDLdescriptionsintoagate-levelnetlist.Thisenabledastyleofdesigncalledstandard-celldesign.Standard-cellIntegratedCircuits(ICs)aredesignedinthefollowingconceptualstages,althoughthesestagesoverlapsignificantlyinpractice.,标准单元集成电路的设计过程在概念上需经过以下几个过程,但事实上在实际生产中这些工序都有较大的重叠。,39,8,Thesesteps,implementedwithalevelofskillcommonintheindustry,almostalwaysproduceafinaldevicethatcorrectlyimplementstheoriginaldesign,unlessflawsarelaterintroducedbythephysicalfabricationprocess.7,以工业界普通的熟练水平实现的这些步骤几乎总是产生能正确实现原设计的最终器件,除非后来在物理制造过程中引入了缺陷。,40,9,Ateamofdesignengineersstartswithanon-formalunderstandingoftherequiredfunctionsforanewASIC,usuallyderivedfromrequirementsanalysis.,对新的ASIC所要求功能的非正式理解,41,9,ThedesignteamconstructsadescriptionofanASICtoachievethesegoalsusinganHDL.Thisprocessisanalogoustowritingacomputerprograminahigh-levellanguage.ThisisusuallycalledtheRTL(registertransferlevel)design.,这一过程可类比于用高级语言编写计算机程序,42,9,Suitabilityforpurposeisverifiedbysimulation.Avirtualsystemcreatedinsoftware,usingatoolsuchasVirtutechsSimics,cansimulatetheperformanceofASICsatspeedsuptobillionsofsimulatedinstructionspersecond.,以高达每秒数十亿条模拟指令的速度来模拟ASIC的功能,43,9,Alogicsynthesistool,suchasDesignCompiler,transformstheRTLdesignintoalargecollectionoflower-levelconstructscalledstandardcells.Theseconstructsaretakenfromastandard-celllibraryconsistingofpre-characterizedcollectionsofgatessuchas2inputnor,2inputnand,inverters,etc.8,这些构成的元素是从一个标准单元库中得到的,这个库由事先规定好的门电路集合构成,例如2输入或非门,2输入与非门,非门等等。,44,9,ThestandardcellsaretypicallyspecifictotheplannedmanufactureroftheASIC.Theresultingcollectionofstandardcells,plustheneededelectricalconnectionsbetweenthem,iscalledagate-levelnetlist.,所产生的所有标准单元加上连接他们所需要的导线称为门级网表。,45,9,Thegate-levelnetlistisnextprocessedbyaplacementtoolwhichplacesthestandardcellsontoaregionrepresentingthefinalASIC.Itattemptstofindaplacementofthestandardcells,subjecttoavarietyofspecifiedconstraints.Sometimesadvancedtechniquessuchassimulatedannealingareusedtooptimizeplacement.,将标准单元布局在代表最终ASIC的区域,服从各种规定的约束,46,9,Theroutingtooltakesthephysicalplacementofthestandardcellsandusesthenetlisttocreatetheelectricalconnectionsbetweenthem.Sincethesearchspaceislarge,thisprocesswillproducea“sufficient”ratherthan“globally-optimal”solution.TheoutputisasetofphotomasksenablingsemiconductorfabricationtoproducephysicalICs.,由于搜索空间很大,该过程将产生满足充分条件的解,而不是全局最优解。,47,9,Closeestimatesoffinaldelays,parasiticresistancesandcapacitances,andpowerconsumptionscanthenbemade.Inthecaseofadigitalcircuit,thiswillbefurthermappedintodelayinformation.Theseestimatesareusedinafinalroundoftesting.Thistestingdemonstratesthatthedevicewillfunctioncorrectlyoverallextremesoftheprocess,voltageandtemperature.Whenthistestingiscompletethephotomaskinformationisreleasedforchipfabrication.,这一测试表明器件将在所有极端的过程、电压、温度下正常工作。,48,10,Thesedesignsteps(orflow)arealsocommontostandardproductdesign.ThesignificantdifferenceisthatStandardCelldesignusesthemanufacturerscelllibrariesthathavebeenusedinhundredsofotherdesignimplementationsandthereforeareofmuchlowerriskthanfullcustomdesign.9,重要的差别在于标准单元设计使用制造商的单元库,这些库已用于数以百计的设计实现,因而比起全定制设计来风险小得多。,49,11Gatearraydesign,Gatearraydesignisamanufacturingmethodinwhichthediffusedlayers,i.e.transistorsandotheractivedevices,arepredefinedandwaferscontainingsuchdevicesareheldinstockpriortometallization,inotherwords,unconnected.10,门阵列设计是一种制造方法,事先定义好扩散层(晶体管和其它有源器件),包含这些器件的晶片在金属化之前被库存,就是说先不进行联接。,50,11,Thephysicaldesignprocessthendefinestheinterconnectionsofthefinaldevice.ItisimportanttothedesignerthatminimalpropagationdelayscanbeachievedinASICsversustheFPGAsolutionsavailableinthemarketplace.GatearrayASICisacompromiseasmappingagivendesignontowhatamanufacturerheldasastockwafernevergives100%utilization.11,门阵列ASIC是一种折中方案,因为将某一给定的设计与制造商库存的晶片相对应总是不可能达到100%利用率的。,51,12,Pure,logic-onlygatearraydesignisrarelyimplementedbycircuitdesignerstoday,replacedalmostentirelybyfieldprogrammabledevicessuchasFPGAs,whichcanbeprogrammedbytheuserandthusofferminimaltoolingcharges,marginallyincreasedpiecepartcostandcomparableperformance.12,现在电路设计者已经很少采用纯粹的逻辑门阵列设计,而几乎都代之以FPGA之类的现场可编程器件了。这些器件可由用户编程,使工具作业费用最低,以略为提高的零件价格获得可比的性能。,52,12,TodaygatearraysareevolvingintostructuredASICsthatconsistofalargeIPcorelikeaprocessor,DSPunit,peripherals,standardinterfaces,integratedmemoriesSRAM,andablockofreconfigurableuncommittedlogic.13,现在门阵列正在发展为结构化ASIC,其中包含很大的IP内核,如处理器、DSP单元、外围设备、标准接口、集成SRAM存储器、以及一组可重新设置的未确定功能的逻辑单元。,IPcore(intellectualpropertycore):预先设计好,可复用,有知识产权的硬件或软件块,53,12,ThisshiftislargelybecauseASICdevicesarecapableofintegratingsuchlargeblocksofsystemfunctionalityand“systemonachip”requiresfarmorethanjustlogicblocks.,片上系统所要求的(功能)比仅仅逻辑单元多得多,54,13Full-customdesign,Thebenefitsoffull-customdesignusuallyincludereducedarea,performanceimprovementsandalsotheabilitytointegrateanalogcomponentsandotherpre-designedcomponentssuchasmicroprocessorcoresthatformaSystem-on-Chip.,减小的面积,性能的改进,以及集成模拟元件和其他预先设计的元件,55,13,Thedisadvantagescanincludeincreasedmanufacturinganddesigntime,increasednon-recurringengineeringcosts,morecomplexityintheCADsystemandamuchhigherskillrequirementonthepartofthedesignteam.14,缺点包括增加的制造和设计时间,增加的不可循环工程成本,更复杂的CAD系统,和对设计团队熟练程度高得多的要求。,56,13,Howeverfordigitalonlydesigns,“standard-cell”librariestogetherwithmodernCADsystemscanofferconsiderableperformance/costbenefitswithlowrisk.Automatedlayouttoolsarequickandeasytouseandalsoofferthepossibilitytomanua

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