VERILOGA语言编程入门.ppt

CompactmodelingwithVerilogA DamienQuerliozInstitutd ElectroniqueFondamentale Univ Paris Sud CNRS Orsay 1 Outline WhatVerilogAisTwosimpleexamples and HowitworksUnderstandingautomaticderivativesHazardsofVerilogA 2 HardwareDESCRIPTIONlanguages Verilog digitalsystemsCanbesynthetizediflow levelcodeVerilogA analogequationsAppropriateforcompactmodelsVerilogAMS canmixanaloganddigitalinputs outputsAllowsmixedsignalsimulation 3 Verilogvs VHDL 2competitors VHDLandVHDL AMS VerilogandVerilogA MS VHDLmorerigorous VerilogsimplerFordigital USA Verilog Europe VHDLForanalogandmixedsignal USA VerilogA MS Europe DEPENDS 4 VerilogAvs C CompactmodelsusedtobewritteninCNeedtoberewrittenfordifferentsimualtorsNeedtocomputederivatievsbyhandNeedtowritedifferentcodeforDC AC trananalysisBUTyouunderstandperformancebetterBUTVerilogAcanoftenbeasfastasCtoday 5 Asupersimpleexample include disciplines vams moduleR p n electricalp n parameterrealR 50 0 analogbeginV p n R I p n endendmodule 6 CouldaswellbeI p n V p n R Amorecomplicatedexample include disciplines vams include constants vams modulediode a c inouta c electricala c int branch a int res branch int c dio parameterrealis 10pfrom 0 inf parameterrealrs 0 0from 0 inf parameterrealcjo 0 0from 0 inf parameterrealvj 1 0from 0 inf realvd id qd analogbeginV res I res rs vd V dio id is limexp vd vt 1 0 if vd vj beginqd cjo vj 1 0 2 0 sqrt 1 0 vd vj endelsebeginqd cjo vd 1 0 vd 4 0 vj endI dio id I dio ddt qd endendmodule 7 assignsaVARIABLEvd V dio addsacontributionavoltageorcurrentI dio ddt qd allowstodefineaDIFFERENTIALequationforavoltageorcurrentV n ddt V n V n V lala 8 Howthisworks EveryITERATTIONofthesimulator itgoesthrutheanalogblocks thisdefinestheequationsthesimulatorhastosolveHighlynonlinearsystemThesimulatorwillusuallyuseiterativemethods egNewton Raphson NEEDDERIVATIVESOFSTUFFWITHREGARDSTOVOLTAGESANDCURRENTSItwillAUTOMATICALLYcomputethembasedontheequationsthatyougive 9 YOUREQUATIONSSHOULDBEDERIBAVLEWITHCONTINUOUSDERIVATIVES 10 I V I V SEVERECONVERGENCEISSUES CONVERGENCEISSUES I V GOOD IF CANBEDANGEROUS if vd 0 beginq 0 endelsebeginq vdendFINEINALLLANGUAGESBUTNOTINVERILOGAWILLASSUMEdq dvd 0FORvd 0 11 Otherhazardswithautomaticderivatives SQRThasnoderivativeat0if vd vj beginqd cjo vj 1 0 2 0 sqrt 1 0 vd vj endelsebeginqd cjo vd 1 0 vd 4 0 vj EndINALLLANGUAGES WOULDHAVEBEENFINEBUTNOTINVERILOGA 12 Otherhazards abshasnoncontinuousderivativelogisdecimallog lnisnaturallogSugge